
USB Registers
1718
SLAU723A – October 2017 – Revised October 2018
Copyright © 2017–2018, Texas Instruments Incorporated
Universal Serial Bus (USB) Controller
27.5.15 USBnXFIFOSZ Register [reset = 0x0]
USB Transmit Dynamic FIFO Sizing (USBTXFIFOSZ), offset 0x062
USB Receive Dynamic FIFO Sizing (USBRXFIFOSZ), offset 0x063
OTG A / Host
OTG B / Device
These 8-bit registers allow the selected TX/RX endpoint FIFOs to be dynamically sized. USBEPIDX is
used to configure each transmit endpoint's FIFO size.
USBnXFIFOSZ is shown in
and described in
Return to
Figure 27-20. USBnXFIFOSZ Register
7
6
5
4
3
2
1
0
RESERVED
DPB
SIZE
R-0x0
R/W-0x0
R/W-0x0
Table 27-25. USBnXFIFOSZ Register Field Descriptions
Bit
Field
Type
Reset
Description
7-5
RESERVED
R
0x0
4
DPB
R/W
0x0
Double Packet Buffer Support.
0x0 = Only single-packet buffering is supported.
0x1 = Double-packet buffering is supported.
3-0
SIZE
R/W
0x0
Max Packet Size.
Maximum packet size to be allowed.
If DPB = 0, the FIFO also is this size.
If DPB = 1, the FIFO is twice this size.
0x0 = 8-byte packet size
0x1 = 16-byte packet size
0x2 = 32-byte packet size
0x3 = 64-byte packet size
0x4 = 128-byte packet size
0x5 = 256-byte packet size
0x6 = 512-byte packet size
0x7 = 1024-byte packet size
0x8 = 2048-byte packet size
0x9 to 0xF = Reserved