Lit. Number
2
PMP15034 Test Results
1.8V~5.5V
TLV61046A
Boost Converter
VIN
GND
VOUT
PWM
15V
GND
U2
Q2
LS
Charge Pump
SW
30V
Q1
+
-
Figure 2: Block Diagram of ±15-V Driver Circuit
Design Theory
The schematic of the 28-V driver circuit is shown in Figure 3. The output voltage of the boost converter is
configured by R1 and R3. This voltage should be set to as high as possible to get highest sound.
Q1 is a NPN device driven by the PWM signal from the MCU. The sounder TS1 is charged to 28V when Q1 turns
on, and discharged by the R2 to 0V when Q1 turns off. The frequency of the PWM should be equal to the
recommended operating frequency of the sounder, which is 4KHz in this reference design.
The duty cycle of the PWM and the R2 resistance impact the sound press of TS1. They also impact the power
loss of the driver circuit because the current flows through R2 to ground when Q1 turns on.
The power loss of R2 is calculated by equation (1), where D is duty cycle of the input PWM signal.
P
R2
= V
OUT
2
× D ÷ R2 (1)
Follows are two steps to find suitable R2 and duty cycle to compromise the sound press and power loss:
Setting the duty cycle to 50%, select a 1-
KΩ to 10-KΩ resistor that minimize the power loss without
suffering the sound press
Using R2 selected by step 1, slowly decrease the duty cycle to minimize the power loss if the sound press
requirement is met.
Figure 3: 28-V Rectangular Waveform Driver Circuit
