background image

5

5

4

4

3

3

2

2

1

1

D

D

C

C

B

B

A

A

PLACE ALL Rs CLOSE TO SW

SW IN THE OFF POSITION = OPEN

ON

OFF

OFF

ON

OFF

ON

OFF

ON

OFF

ON

OFF

ON

OFF

ON

OFF

ON

OFF

ON

PIN MODE SETTINGS:

SW1 - EQB0, EQB1

SW2 - ENSMB = 1K TO GND

SW3 - DEMA0, DEMA1

SW4 - OFF POSITION

SW5 - DEMB0, DEMB1

SW6 - SD_TH, RES

SW7 - ON (GND) FOR 3.3V

SW8 - RD_EN2-4=ON (SD_TH)

SW9 - OFF POSTION

SW10 - RXDET, RATE

SW11 - EQA0, EQA1

SW12 - OFF POSITION

SW13 - OFF POSITION

SW14 - PRSNT2_4=ON

SMBUS SLAVE MODE SETTINGS:

SW1 - AD3, AD2

SW2 - ENSMB = 1K TO VDD

SW3 - OFF POSTION

SW4 - ON POSTION (SDA, SCL)

SW5 - AD1, AD0

SW6 - SD_TH, RES

SW7 - ON (GND) FOR 3.3V

SW8 - RD_EN2-4=ON (SD_TH)

SW9 - OFF POSTION

SW10 - RXDET, RATE

SW11 - EQA0, EQA1

SW12 - OFF POSITION WHEN USING SPA BOARD

SW13 - OFF POSTION

SW14 - PRSNT2_4=ON

PIN 1-2 FOR 3.3V

PIN 2-3 FOR 2.5V

SMBUS MASTER (READ EEPROM) MODE SETTINGS:

SW1 - AD3, AD2

SW2 - ENSMB = FLOAT

SW3 - OFF POSTION

SW4 - ON POSTION (SDA, SCL)

SW5 - AD1, AD0

SW6 - OFF POSITION

SW7 - ON (GND) FOR 3.3V

SW8 - SD_TH=ON, RD_EN2-4=OFF

SW9 - ON POSTION (ALL_DONE TO RD_EN, ALL_DONE4 TO PRSNT)

SW10 - RXDET, RATE

SW11 - EQA0, EQA1

SW12 - OFF POSITION

SW13 - GND TO START THE READ PROCESS

SW14 - OFF POSITION

ON

OFF

ON

OFF

FOR 16X LANES 

SET PRSNT TO PRSNT2_4

ON

OFF

ON

OFF

DS80PCI800 PCIE 16X CARD PAGE 2

A

PCIE16X_800EVK

B

1

1

Thursday, January 06, 2011

Title

Size

Document Number

Rev

Date:

Sheet

of

GND

VIH

GND

VIH

EQB0_AD3

EQB1_AD2

ENSMB

VIH

GND

DEMA0_SDA

VIH

DEMA1_SCL

VIH

VIH

VIH

GND

EQA0

VIH

EQA1

RXDET

GND

VIH

GND

RATE

VIH

VIH

RES

DEMB1_AD0

GND

GND

GND

VIH

GND

VIH

DEMB0_AD1

SCL

SDA

GND

GND

GND

GND

GND

GND

SDA

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

SCL

GND

3_3V

VOUT1_2

VIH

GND

VIH

RD_EN2

RD_EN3

RD_EN4

A_D1

A_D2

A_D3

RD_EN2

RD_EN4

RD_EN3

SD_TH

SCL

SDA

SMCLK

SMDAT

PRSNT2_4

PRSNT

PRSNT2_3

PRSNT2_2

PRSNT2_1

DEMA0_SDA

EQB0_AD3

RXDET

PRSNT

DEMA1_SCL

DEMB0_AD1

EQA1

RES

EQA0

ENSMB

DEMB1_AD0

RATE

EQB1_AD2

RD_EN3

SD_TH

A_D2

SMDAT

RD_EN4

A_D3

A_D1

RD_EN2

SMCLK

PRSNT2_1

PRSNT2_3

PRSNT2_4

PRSNT2_2

VDD_SEL1_2

VDD_SEL3_4

VDD_SEL1_2

VDD_SEL3_4

GND

GND

VOUT1_2

A_D4

PRSNT

A_D4

SCL

SDA

VIH

3_3V

PRSNT

DEMA0_SDA

RXDET

DEMB0_AD1

EQB0_AD3

EQB1_AD2

RATE

DEMB1_AD0

EQA0

ENSMB

EQA1

RES

DEMA1_SCL

RD_EN4

SMDAT

SMCLK

RD_EN3

A_D2

SD_TH

A_D3

RD_EN2

A_D1

PRSNT2_1

PRSNT2_2

PRSNT2_4

PRSNT2_3

VDD_SEL1_2

VDD_SEL3_4

VOUT1_2

A_D4

3_3V

R56

2k

R27 4.99k

SW4

219-2MST

R20 249

SW5

219-6MST

R49 249

SW14

219-4MST

R19 249

R37 249

R23 249

R35 249

R41 249

J9

4808-3004-CP

1

2

3

4

8

7

6

5

1

2

3

4

8

7

6

5

R29 249

R44 249

R12 4.99k

SW1

219-6MST

R14 249

R51 1k

SW6

219-6MST

SW7

219-2MST

R40 249

R36 4.99k

R26 249

R28 249

R17 249

SW11

219-6MST

SW3

219-6MST

J8

4 HEADER

1

2

3

4

R45 4.99k

R54

1k

R46 249

SW13

EVQ-21505R

R34 249

R16 249

R15 4.99k

R47 249

R39 4.99k

J7

3 HEADER

1

2

3

R32 249

R31 249

R24 4.99k

R25 249

R21 4.99k

SW2

219-3MST

R53

1k

R48 4.99k

R55

2k

R22 249

R11 249

R50 1k

R13 249

SW10

219-6MST

R52 1k

R38 249

SW8

219-4MST

R42 4.99k

R18 4.99k

R30 4.99k

SW12

219-2MST

R43 249

SW9

219-4MST

R33 4.99k

Содержание PCIE16X-800EVK

Страница 1: ...AS raid controller card Features 8 channel PCIe repeater up to 8 Gbps GEN 3 Low power consumption with option to power down unused channels Adjustable receive equalization Adjustable transmit VOD and De emphasis IDLE detection squelch function auto mutes the output Programmable via pin selection or SMBus interface Single supply operation VIN 3 3V 10 or VDD 2 5V 5 40 C to 85 C Operation 6 kV HBM ES...

Страница 2: ... Texas Instruments 2011 www ti com Figure 1 PCIE16X 800EVK Evaluation Board ...

Страница 3: ...ional socket for EEPROM SW1 EQB 1 0 or AD 3 2 PIN MODE EQ control for channel B inputs SMBUS MODE AD 3 2 device address bits SW2 ENSMB ENSMB LOW PIN MODE ENSMB HIGH SMBUS slave mode ENSMB FLOAT SMBUS master mode load configuration from EEPROM SW3 DEMA 1 0 PIN MODE DE control for channel A outputs SW4 SDA SCL ON position connects SDA and SCL lines to the device pin SW5 DEMB 1 0 or AD 1 0 PIN MODE D...

Страница 4: ...XDET 1 50 ohm input termination set switches 3 2 1 OFF OFF ON SW10 RATE F enable rate detection set switches 6 5 4 to OFF OFF OFF RATE R GEN3 mode set switches 6 5 4 OFF ON OFF RATE 0 GEN1 2 mode set switches 6 5 4 ON OFF OFF SW6 SD_TH F default signal detect threshold level set switches 3 2 1 OFF OFF OFF SW6 LPBK RES F normal operation set switches 6 5 4 OFF OFF OFF SW8 Set switches to OFF positi...

Страница 5: ...s of VOD and DE when in pin mode In Gen 1 2 the de emphasis level can be set with the DEMx 1 0 pins but is not available in Gen 3 Level DEMA B 1 0 SW5 DEMB 1 0 SW3 DEMA 1 0 GEN1 2 6 5 4 3 2 1 VOD Vp p DE dB 1 0 0 ON OFF OFF ON OFF OFF 0 8 0 2 0 R ON OFF OFF OFF ON OFF 0 9 0 3 0 F ON OFF OFF OFF OFF OFF 0 9 3 5 4 0 1 ON OFF OFF OFF OFF ON 1 0 0 5 R 0 OFF ON OFF ON OFF OFF 1 0 3 5 6 R R OFF ON OFF O...

Страница 6: ... Texas Instruments 2011 www ti com Document ID PCIE16X 800EVK User Guide Date November 2011 Rev 1 2 ...

Страница 7: ...AP C88 0 22uF C70 0 22uF C1330 22uF C45 0 22uF C33 0 22uF C10 0 1uF C7 0 1uF C9 0 1uF C79 0 22uF C1000 22uF R1 1 5k U1 DS80PCI800 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 54 53 52 51 50 49 48 47 46 55 IB_0 IB_0 IB_1 IB_1 IB_2 IB_2 IB_3 IB_3 VDD IA_0 IA_0 IA_1 IA_1 VDD IA_2 IA_2 IA_3 IA_3 EQA1 EQA0 RATE RXDET RES V...

Страница 8: ...A1_SCL VIH VIH VIH GND EQA0 VIH EQA1 RXDET GND VIH GND RATE VIH VIH RES DEMB1_AD0 GND GND GND VIH GND VIH DEMB0_AD1 SCL SDA GND GND GND GND GND GND SDA GND GND GND GND GND GND GND GND GND GND GND SCL GND 3_3V VOUT1_2 VIH GND VIH RD_EN2 RD_EN3 RD_EN4 A_D1 A_D2 A_D3 RD_EN2 RD_EN4 RD_EN3 SD_TH SCL SDA SMCLK SMDAT PRSNT2_4 PRSNT PRSNT2_3 PRSNT2_2 PRSNT2_1 DEMA0_SDA EQB0_AD3 RXDET PRSNT DEMA1_SCL DEMB0...

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