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L3 and L4 Memory Space Mapping
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Table 2-4. L4-Wakeup Memory Space Mapping (continued)
Device Name Start Address End Address Size (KB) Description
(Hex) (Hex)
Reserved 0x4832 A800 0x4833 FFFF 86 Reserved
2.3.2.3 L4-Peripheral Memory Space Mapping
The L4-Per interconnect is a 1-MB space composed of the L4-Per interconnect configuration registers and
the module registers.
Table 2-5 describes the mapping of the registers for the L4-Per interconnect.
NOTE: All memory spaces described as modules provide direct access to the module registers
outside the L4-Per interconnect. All other accesses are internal to the L4-Per interconnect.
Table 2-5. L4-Peripheral Memory Space Mapping
Device Name Start Address End Address Size Description
(Hex) (Hex)
L4-Per 0x4900 0000 0x490F FFFF 1MB
L4-Per configuration 0x4900 0000 0x4900 07FF 2KB AP
0x4900 0800 0x4900 0FFF 2KB IP
0x4900 1000 0x4900 1FFF 4KB LA
Reserved 0x4900 2000 0x4901 FFFF 120KB Reserved
UART3 0x4902 0000 0x4902 0FFF 4KB Module
(infrared)
0x4902 1000 0x4902 1FFF 4KB L4 interconnect
McBSP2 0x4902 2000 0x4902 2FFF 4KB Module
(audio for codec)
0x4902 3000 0x4902 3FFF 4KB L4 interconnect
McBSP3 0x4902 4000 0x4902 4FFF 4KB Module
(Bluetooth ® voice data)
0x4902 5000 0x4902 5FFF 4KB L4 interconnect
McBSP4 0x4902 6000 0x4902 6FFF 4KB Module
(digital baseband voice data)
0x4902 7000 0x4902 7FFF 4KB L4 interconnect
McBSP2 (sidetone) 0x4902 8000 0x4902 8FFF 4KB Module
0x4902 9000 0x4902 9FFF 4KB L4 interconnect
McBSP3 (sidetone) 0x4902 A000 0x4902 AFFF 4KB Module
0x4902 B000 0x4902 BFFF 4KB L4 interconnect
Reserved 0x4902 C000 0x4902 FFFF 16KB Reserved
WDT3 0x4903 0000 0x4903 0FFF 4KB Module
0x4903 1000 0x4903 1FFF 4KB L4 interconnect
GPTIMER2 0x4903 2000 0x4903 2FFF 4KB Module
0x4903 3000 0x4903 3FFF 4KB L4 interconnect
GPTIMER3 0x4903 4000 0x4903 4FFF 4KB Module
0x4903 5000 0x4903 5FFF 4KB L4 interconnect
GPTIMER4 0x4903 6000 0x4903 6FFF 4KB Module
0x4903 7000 0x4903 7FFF 4KB L4 interconnect
GPTIMER5 0x4903 8000 0x4903 8FFF 4KB Module
0x4903 9000 0x4903 9FFF 4KB L4 interconnect
GPTIMER6 0x4903 A000 0x4903 AFFF 4KB Module
0x4903 B000 0x4903 BFFF 4KB L4 interconnect
GPTIMER7 0x4903 C000 0x4903 CFFF 4KB Module
0x4903 D000 0x4903 DFFF 4KB L4 interconnect
214 Memory Mapping SWPU177N – December 2009 – Revised November 2010
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