Texas Instruments OMAP36 Series, Техническое справочное руководство

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Camera ISP Functional Description
CAUTION
Because some of the read ports are shared, software must enable the modules
that
will use the shared read port. For more information, see
Section 6.4.9.2.3 ,Camera ISP Shared Buffer Logic Read Buffer Logic (RBL)
and Read Buffer.
6.4.9.2 Camera ISP Shared Buffer Logic Functional Operations
6.4.9.2.1 Camera ISP Shared Buffer Logic Parameters
Table 6-47 summarizes the central-resource SBL parameters. Those parameters are fixed at design time
and cannot be changed by users. The functional operations of the central-resource SBL are based on a
fixed data size of 256 bytes called a data unit (DU). P0 has the highest priority and P14 has the lowest
priority.
Table 6-47. Camera ISP Shared Buffer Logic Fixed Parameters
Port Port Direction Port Priority Buffer Size Bytes Description
CSI2A WRITE P3 1024 = 4DUs CSI2A output port
CSI1/CCP2B WRITE P2 1024 = 4DUs CSI1/CCP2B output port or
and CSI2C CSI2C output port
CCDC WRITE P4 1024 = 4DUs CCDC output port
READ P1 512 = 2DUs CCDC fault pixel correction
input port
PREVIEW WRITE P9 1024 = 4DUs PREVIEW output port
READ P13 1024 = 4DUs PREVIEW input port
CSI1/CCP2B data input port
READ P0 1024 = 4DUs PREVIEW dark-frame input
port
CCDC lens-shading
compensation input port
RESIZER WRITE P5 1024 = 4DUs RESIZER output line 1 port
WRITE P6 1024 = 4DUs RESIZER output line 2 port
WRITE P7 1024 = 4DUs RESIZER output line 3 port
WRITE P8 1024 = 4DUs RESIZER output line 4 port
READ P12 1024 = 4DUs RESIZER input port
H3A WRITE P10 512 = 2DUs H3A output - AF port
WRITE P11 512 = 2DUs H3A output - AE/AWB port
HIST READ P14 512 = 2DUs HIST input port
6.4.9.2.2 Camera ISP Shared Buffer Logic Write-Buffer Logic (WBL) and Write Buffer
The central-resource SBL uses multiple WBL blocks to interface between the modules' write ports and the
write-buffer memory.
• One WBL is instantiated for each module write port.
• Each WBL collects the module's write port output data and transfers the data to the write-buffer
memory. Arbitration occurs between the WBL blocks to access the write-buffer memory.
• Each WBL is responsible for tracking all corresponding DUs in the write-buffer memory. There can be
2 or 4 DUs in the write buffer associated with a WBL.
• A WBL generates a command to memory when:
– The write data crosses a DU boundary. At this point, the module starts filling a new DU. Also, the
WBL generates a command to transfer the previous DU to memory.
– An end-of-frame occurs. The DU (even if not full) is transferred to memory, and a command is
issued.
1231 SWPU177N – December 2009 – Revised November 2010 Camera Image Signal Processor
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