Texas Instruments OMAP36 Series, Техническое справочное руководство

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IVA2.2 Subsystem Register Manual
Table 5-651. Register Call Summary for Register CAVLC_STRMWDU
IVA2.2 Subsystem Basic Programming Model
• Setting Up Registers for CAVLC Operation : [0] [1] [2]
IVA2.2 Subsystem Register Manual
• iVLCD Register Mapping Summary : [3]
Table 5-652. CAVLC_STRMWDL
Address Offset 0x0000 115C
Physical Address 0x0008 115C Instance iVLCD
Description Lower half of 32-bit Stream Word Register
Type RW
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
RESERVED STRMWDL
Bits Field Name Description Type Reset
31:16 RESERVED Write 0s for future compatibility RW 0x0000
Read returns 0
15:0 STRMWDL Lower half of 32-bit Stream Word Register. Write bits from MSB so RW 0x0000
that bitstream to be generated follows them. After the completion of
the job, remaining bits, which is less than 32 and not written to
Image Buffer, is shown.
Table 5-653. Register Call Summary for Register CAVLC_STRMWDL
IVA2.2 Subsystem Basic Programming Model
• Setting Up Registers for CAVLC Operation : [0] [1]
IVA2.2 Subsystem Register Manual
• iVLCD Register Mapping Summary : [2]
Table 5-654. CAVLC_HDPTR
Address Offset 0x0000 1160
Physical Address 0x0008 1160 Instance iVLCD
Description This register sets Huffman memory read pointer
Type RW
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
RESERVED HDPTR
Bits Field Name Description Type Reset
31:12 RESERVED Write 0s for future compatibility RW 0x0
Read returns 0
11:0 HDPTR Set a pointer in Huffman memory from which CAVLC will read pairs RW 0x000
of an MB header symbol and its length, and pack the symbols into
bitstream. Must be even number.
Table 5-655. Register Call Summary for Register CAVLC_HDPTR
IVA2.2 Subsystem Basic Programming Model
• Setting Up Registers for CAVLC Operation : [0]
IVA2.2 Subsystem Register Manual
• iVLCD Register Mapping Summary : [1]
1039 SWPU177N – December 2009 – Revised November 2010 IVA2.2 Subsystem
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