Texas Instruments OMAP36 Series, Техническое справочное руководство

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IVA2.2 Subsystem Register Manual
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Bits Field Name Description Type Reset
31:1 RESERVED Write 0s for future compatibility RW 0x0000
Read returns 0
0 CAVLC_GO Setting this bit will start CAVLC module. This bit is high while CAVLC RW 0x0
module is running and cleared automatically after the completion of
the job.
Table 5-639. Register Call Summary for Register CAVLC_GO_REG
IVA2.2 Subsystem Basic Programming Model
• Setting Up Registers for CAVLC Operation : [0]
IVA2.2 Subsystem Register Manual
• iVLCD Register Mapping Summary : [1]
Table 5-640. CAVLC_MBTYPE
Address Offset 0x0000 1144
Physical Address 0x0008 1144 Instance iVLCD
Description This register controls the macro-block type
Type RW
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
RESERVED CODBLKPAT
INTRA1616
RESERVED
Bits Field Name Description Type Reset
31:9 RESERVED Write 0s for future compatibility RW 0x00
Read returns 0
8 INTRA1616 Set high when intra16x16 macroblock RW 0x0
7:6 RESERVED Write 0s for future compatibility RW 0x0
Read returns 0
5:0 CODBLKPAT Set coded block pattern as the H.264 standard describes RW 0x00
Table 5-641. Register Call Summary for Register CAVLC_MBTYPE
IVA2.2 Subsystem Basic Programming Model
• Setting Up Registers for CAVLC Operation : [0]
IVA2.2 Subsystem Register Manual
• iVLCD Register Mapping Summary : [1]
Table 5-642. CAVLC_RBTOP
Address Offset 0x0000 1148
Physical Address 0x0008 1148 Instance iVLCD
Description This register sets the Ring Buffer Top Pointer
Type RW
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
RESERVED RBTOP
1036 IVA2.2 Subsystem SWPU177N – December 2009 – Revised November 2010
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