Digital I/O Registers
388
SLAU367P – October 2012 – Revised April 2020
Copyright © 2012–2020, Texas Instruments Incorporated
Digital I/O
12.4.1 PxIV Register
Port x Interrupt Vector Register, x = 1 to 9 (see the device-specific data sheet to determine which ports
support interrupts)
Figure 12-1. PxIV Register
15
14
13
12
11
10
9
8
PxIV
r0
r0
r0
r0
r0
r0
r0
r0
7
6
5
4
3
2
1
0
PxIV
r0
r0
r0
r-0
r-0
r-0
r-0
r0
Table 12-4. PxIV Register Description
Bit
Field
Type
Reset
Description
15-0
PxIV
R
0h
Port x interrupt vector value
00h = No interrupt pending
02h = Interrupt Source: Port x.0 interrupt; Interrupt Flag: PxIFG.0; Interrupt
Priority: Highest
04h = Interrupt Source: Port x.1 interrupt; Interrupt Flag: PxIFG.1
06h = Interrupt Source: Port x.2 interrupt; Interrupt Flag: PxIFG.2
08h = Interrupt Source: Port x.3 interrupt; Interrupt Flag: PxIFG.3
0Ah = Interrupt Source: Port x.4 interrupt; Interrupt Flag: PxIFG.4
0Ch = Interrupt Source: Port x.5 interrupt; Interrupt Flag: PxIFG.5
0Eh = Interrupt Source: Port x.6 interrupt; Interrupt Flag: PxIFG.6
10h = Interrupt Source: Port x.7 interrupt; Interrupt Flag: PxIFG.7; Interrupt
Priority: Lowest