15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0
0
0
1
1
Source 19:16
A/L
Rsvd
Destination 19:16
Op-code
Rsrc
Ad
B/W
As
Rdst
XORX.A #12345h, 45678h(R15)
0
0
0
1
1
1
0
0
4
14 (XOR)
0 (PC)
1
1
3
15 (R15)
18xx extension word
12345h
@PC+
X(Rn)
Source 15:0
Destination 15:0
Immediate operand LSBs: 2345h
Index destination LSBs: 5678h
01: Address
word
MSP430 and MSP430X Instructions
148
SLAU367P – October 2012 – Revised April 2020
Copyright © 2012–2020, Texas Instruments Incorporated
CPUX
Figure 4-28. Example for Extended Immediate or Indexed Instruction
4.5.2.3
Extended Double-Operand (Format I) Instructions
All 12 double-operand instructions have extended versions as listed in
(1)
* = Status bit is affected
– = Status bit is not affected
0 = Status bit is cleared
1 = Status bit is set
Table 4-13. Extended Double-Operand Instructions
Mnemonic
Operands
Operation
Status Bits
(1)
V
N
Z
C
MOVX(.B,.A)
src,dst
src
→
dst
–
–
–
–
ADDX(.B,.A)
src,dst
src + dst
→
dst
*
*
*
*
ADDCX(.B,.A)
src,dst
src + dst + C
→
dst
*
*
*
*
SUBX(.B,.A)
src,dst
dst + .not.src + 1
→
dst
*
*
*
*
SUBCX(.B,.A)
src,dst
dst + .not.src + C
→
dst
*
*
*
*
CMPX(.B,.A)
src,dst
dst – src
*
*
*
*
DADDX(.B,.A)
src,dst
src + dst + C
→
dst (decimal)
*
*
*
*
BITX(.B,.A)
src,dst
src .and. dst
0
*
*
Z
BICX(.B,.A)
src,dst
.not.src .and. dst
→
dst
–
–
–
–
BISX(.B,.A)
src,dst
src .or. dst
→
dst
–
–
–
–
XORX(.B,.A)
src,dst
src .xor. dst
→
dst
*
*
*
Z
ANDX(.B,.A)
src,dst
src .and. dst
→
dst
0
*
*
Z