CPU47
CPU Module
Category
Functional
Function
An unexpected Vacant Memory Access Flag (VMAIFG) can be triggered
Description
An unexpected Vacant Memory Access Flag (VMAIFG) can be triggered, if a PC-
modifying instruction (e.g. - ret, push, call, pop, jmp, br) is fetched from the last addresses
(last 4 or 8 byte) of a memory (e.g.- FLASH, RAM, FRAM) that is not contiguous to a
higher, valid section on the memory map.
In debug mode using breakpoints the last 8 bytes are affected.
In free running mode the last 4 bytes are affected.
Workaround
Edit the linker command file to make the last 4 or 8 bytes of affected memory sections
unavailable, to avoid PC-modifying instructions on these locations.
Remaining instructions or data can still be stored on these locations.
DMA4
DMA Module
Category
Functional
Function
Corrupted write access to 20-bit DMA registers
Description
When a 20-bit wide write to a DMA address register (DMAxSA or DMAxDA) is interrupted
by a DMA transfer, the register contents may be unpredictable.
Workaround
1. Design the application to guarantee that no DMA access interrupts 20-bit wide
accesses to the DMA address registers.
OR
2. When accessing the DMA address registers, enable the Read Modify Write disable bit
(DMARMWDIS = 1) or temporarily disable all active DMA channels (DMAEN = 0).
OR
3. Use word access for accessing the DMA address registers. Note that this limits the
values that can be written to the address registers to 16-bit values (lower 64K of Flash).
DMA7
DMA Module
Category
Functional
Function
DMA request may cause the loss of interrupts
Description
If a DMA request starts executing during the time when a module register containing an
interrupt flags is accessed with a read-modify-write instruction, a newly arriving interrupt
from the same module can get lost. An interrupt flag set prior to DMA execution would not
be affected and remain set.
Workaround
1. Use a read of Interrupt Vector registers to clear interrupt flags and do not use read-
modify-write instruction.
OR
2. Disable all DMA channels during read-modify-write instruction of specific module
registers containing interrupts flags while these interrupts are activated.
Advisory Descriptions
SLAZ507AC – JANUARY 2013 – REVISED MAY 2021
MSP430F67671 Microcontroller
13
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