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Hardware
8
SLAU747B – October 2017 – Revised January 2019
Copyright © 2017–2019, Texas Instruments Incorporated
MSP432P4111 SimpleLink™ microcontroller LaunchPad™ development kit
(MSP-EXP432P4111)
2.3
XDS110-ET Onboard Emulator
To keep development easy and cost effective, the TI LaunchPad development kits integrate an onboard
emulator, which eliminates the need for expensive programmers. The MSP-EXP432P4111 has the
XDS110-ET emulator, which is a simple and low-cost debugger that supports nearly all TI Arm device
derivatives.
Figure 5. XDS110-ET Emulator
The XDS110-ET hardware can be found in the schematics in
and in the MSP-EXP432P4111
Hardware Design Files.
2.3.1
XDS110-ET Isolation Block
The J101 isolation block is composed of 10 jumpers (see
). The J101 isolation block allows the
user to connect or disconnect signals that cross from the XDS110-ET domain into the MSP432P4111
target domain. This crossing is shown by the dotted line across the LaunchPad development kit through
J101. No other signals cross this domain, so the XDS110-ET can be decoupled from the MSP432P4111
target side. This includes XDS110-ET power and GND signals, UART, and JTAG signals.
lists the signals that are controlled at the isolation block (also see
).
Table 1. Isolation Block Connections
Signal
Description
GND
GND power connection between XDS110 and MSP432 target GND planes. The GND jumper is populated to
connect the separate GND planes. This connection is required for proper operation with 3V3, 5V, and JTAG
5V
5-V power rail, VBUS from USB
3V3
3.3-V power rail, derived from VBUS by an LDO in the XDS110-ET domain
RXD <<
Backchannel UART: The target MCU receives data through this signal. The arrows indicate the direction of the
signal.
TXD >>
Backchannel UART: The target MCU sends data through this signal. The arrows indicate the direction of the
signal.
RST
MCU RST signal (active low)
TCK_SWCLK
Serial wire clock input (SWCLK); JTAG clock input (TCK)
TMS_SWDIO
Serial wire data input/output (SWDIO); JTAG test mode select (TMS)
TDO_SWO
Serial wire trace output (SWO); JTAG trace output (TWO) (also PJ.5)
TDI
JTAG test data input (also PJ.4)