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SNAU160E – March 2014 – Revised October 2017
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Copyright © 2014–2017, Texas Instruments Incorporated
LMX2492EVM Evaluation Module
3
Typical Measurement
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6
4
Schematic
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12
5
PCB Layout and Layer Stack-up
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14
6
Bill of Materials
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17
7
Troubleshooting Guide
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18
Appendix A
USB2ANY Firmware Upgrade
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19
Appendix B
Using Different Reference Clock
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22
List of Figures
1
EVM Connection Diagram
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4
2
Select Device in TICS Pro
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5
3
Default Mode
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5
4
IO Port
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5
5
Loop Filter
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6
6
Default Output
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7
7
TICS Pro FSK Configuration
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7
8
FSK Example
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8
9
Continuous Sawtooth Ramp Configuration
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8
10
Continuous Sawtooth Ramp Example
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9
11
Continuous Trapezoid Ramp Configuration
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9
12
Flag Out Pins Configuration
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10
13
Flags Out Timing
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10
14
Continuous Trapezoid Ramp Example
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10
15
Readback Setting
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11
16
Register Readback
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11
17
LMX2492EVM Schematic (Page 1)
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12
18
LMX2492EVM Schematic (Page 2)
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13
19
PCB Layer Stack-up
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14
20
Top Layer
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14
21
GND Layer
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15
22
Power Layer
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15
23
Bottom Layer
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16
24
Troubleshooting Guide
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18
25
Firmware Requirement
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19
26
Firmware Loader
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19
27
BSL Button
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20
28
Update Firmware
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20
29
Firmware Update Completed
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21
30
USB Communications
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21
31
Reference Clock Input Configuration
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22
List of Tables
1
Loop Filter Configuration
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6
2
Bill of Materials
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17
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