6 Appendix A - TICS Pro LMK5C33216 Software
6.1 Using the Start Page
The Start Page can be used to configure the PLLs for specific VCO frequencies and DPLL operation.
Figure 6-1. Start Page Location
6.1.1 Step 1
Setup the XO_P input frequency and interface type. Setup the input to the APLL by specifying the reference to
each PLL and associated settings for PLL phase detector frequency.
6.1.2 Step 2
In Step 2, setup the clock input frequencies and the interface type. Cascaded APLLs can also be assigned from
this page using the PLL R-divider and phase detector preview to the right.
Figure 6-2. Step 1 and 2: XO Input and Clock Inputs
6.1.3 Step 3
Set the clock input select mode for the DPLLs, input priority, and maximum TDC frequency.
Appendix A - TICS Pro LMK5C33216 Software
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LMK5C33216EVM User's Guide
SNAU260A – OCTOBER 2020 – REVISED FEBRUARY 2021
Copyright © 2021 Texas Instruments Incorporated
