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Using TICS Pro to Program the LMK04208
10
SNAU200 – September 2016
Copyright © 2016, Texas Instruments Incorporated
LMK04208 User’s Guide
6.7
Enable Clock Outputs
While the LMK04208 offers programmable clock output buffer formats, the evaluation board is shipped
with pre-configured output terminations to match the default buffer type for each output.
To measure Phase noise at one of the clock outputs, for example CLKout0:
1. Click on the Clock Outputs page,
2. Uncheck “Powerdown” in the Clock output box to enable the channel. (10)
3. Set the following as needed:
(a) Digital Delay value (1)
(b) Clock Divider value (3)
(c) Analog Delay Select and Analog Delay Value, if desired (4 and 5). Analog delay will add to noise
floor of output.
Figure 6. Setting Digital Delay, Clock Divider, Analog Delay and Output Format
4. Depending on the configured output type, the clock output SMAs can be interfaced to a test instrument
with a single-ended 50-
Ω
input as follows.
(a) For LVDS:
(i) A balun (like ADT2-1T or high quality Prodyn BIB-100G) is recommended for differential-to-
single-ended conversion.
(b) For LVPECL:
(i) A balun can be used, or
(ii) One side of the LVPECL signal can be terminated with a 50-
Ω
load and the other side can be
run single-ended to the instrument.
5. The phase noise may be measured with a spectrum analyzer or signal source analyzer.
