Setup
6
SNAU205A – March 2017 – Revised August 2019
Copyright © 2017–2019, Texas Instruments Incorporated
LMH1297EVM Evaluation Board
The following jumpers have 4-level input control: J10, J11, J12, J13, J14, J15, J16, J17, J18, and J19.
In Pin Mode, EQ/CD_SEL, OUT0_SEL, HOST_EQ0, OUT_CTRL, SDI_VOD, and SDI_OUT_SEL pins
control different LMH1297 settings. Using SPI or SMBus, these initial pin control values can be overridden
by setting the appropriate override bits through register control. Both SPI and SMBus interfaces allow full
control over a wide range of device settings. See
and
for jumper descriptions and
differences.
Table 3. Description of Connections in SPI Mode (MODE_SEL = Level F)
COMPONENT
NAME
COMMENTS
J1
GND
GND power supply
J2
VDD_CDR
2.5-V VDD_CDR power supply
J3
VIN
2.5-V VIN power supply
J4
VIN_VDD_CDR_Connect
2.5-V power supply. Shunt Pin 1 and 2 to tie VIN and VDD_CDR.
J5
ENABLE
Enable Pin for the LMH1297. Shunt Pin 1 and 2 for proper
operation. Refer to LMH1297 data sheet for detailed information.
J6
SPI_MISO
Shunt Pin 1 and 2 to connect MISO signal to J8 for proper SPI mode
operation.
J7
LOCK_N
Reclocker lock indicator for the selected input. Shunt Pin 1 and 2 for
proper operation. Refer to LMH1297 data sheet for detailed
information.
J8
SPI Access
SPI access pins. See datasheet and EVM schematic for detailed
pinout information.
J9
SPI Access
For SPI mode, install Pin 1-2, 3-4, and 5-6 for SPI 3.3-V to 2.5-V
level shift. Leave Pin 7-10 open.
See the data sheet for additional information on SPI operation.
J10
EQ_CD_SEL
EQ_CD_SEL pin selects the I/O direction. See the data sheet and
EVM schematic for additional operation information.
J11
OUT0_SEL
OUT0_SEL pin enables or disables the OUT0 100-
Ω
output. See
datasheet and EVM schematic for additional operation information.
J12
HOST_EQ0
HOST_EQ0 pin selects the IN0 100-
Ω
EQ Adaption Mode settings
and OUT0 100-
Ω
driver output amplitude and de-emphasis level.
See the data sheet and EVM schematic for additional operation
information.
J13
MODE_SEL
Level F: SPI Mode
J14
OUT_CTRL
OUT_CTRL selects the signal flow from the selected IN port to the
enabled outputs. It selects reclocked data, reclocked data and clock,
bypass reclocker (equalized data route to output driver), or both
equalizer and reclocker bypassed. See the data sheet and EVM
schematic for additional operation information.
J15
SDI_VOD
SDI_VOD selects incremental increase or decrease of nominal
driver output amplitude applied to the SDI_IO (CD Mode) and
SDI_OUT 75-
Ω
outputs. See the data sheet and EVM schematic for
additional operation information.
J16
SS_N
Slave Select. When SS_N is at logic low, it enables SPI access to
the LMH1297 slave device.
J17
MISO
MISO is the SPI serial control data output from the LMH1297 slave
device. MISO is a 2.5-V LVCMOS output.
J18
SDI_OUT_SEL
SDI_OUT_SEL pin enables or disables the SDI_OUT 75-
Ω
output.
See the data sheet and EVM schematic for additional operation
information.
J19
RSV1
Reserved. Do not connect. Leave floating.