QB1
R B2
1
2
D B1
1000p F
C B3
D N P
R B4
V CCB
0 .1 µ F
C B2
G N D
TPB2
TPB1
10 µ F
C B1
0
R B6
0
R B3
1000p F
C B4
D N P
GN D
1 0.0 k
R B1
GN D
GN D
V CCB
TPB4
VOU T
TPBV1
TPBV2
TPBV4
VOU T
VS+
2
VOUT
7
CMPIN
6
GND
9
RESET
4
ALERT
3
IN-
8
IN+
1
CMPREF
5
IN A3 81A2D SG
U B1
1
2
3
JB
TPB3
IN +
TPB5
IN -
R B5
33 12J-1 -50 3E
GN D
TPB6
C MPR EF
1000p F
C B5
TPBV6
TPBV3
IN +
TPBV5
IN -
2 .05 k
R B7
V CCD
Copyright © 2017, Texas Instruments Incorporated
VS+
2
VOUT
7
CMPIN
6
GND
9
RESET
4
ALERT
3
IN-
8
IN+
1
CMPREF
5
U A1
IN A3 81A1D SG
QA1
TPA3
IN +
0
R A2
D A1
1000p F
C A3
D N P
0
R A4
TPA5
IN -
V CCA
0 .1 µ F
C A2
G N D
TPA2
TPA1
10 µ F
C A1
0
R A6
0
R A3
1000p F
C A4
D N P
GN D
1 0.0 k
R A1
GN D
GN D
V CCA
TPA4
VOU T
R A5
33 12J-1 -50 3E
GN D
TPA6
C MPR EF
1000p F
C A5
TPAV6
TPAV1
TPAV2
TPAV3
IN +
TPAV5
IN -
TPAV4
VOU T
1
2
3
JA
2 .05 k
R A7
V CCC
Copyright © 2017, Texas Instruments Incorporated
Schematics, PCB Layout, and Bill of Materials
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Copyright © 2017, Texas Instruments Incorporated
INA381EVM
5
Schematics, PCB Layout, and Bill of Materials
NOTE:
Board layouts are not to scale. These figures are intended to show how the board is laid out.
The figures are not intended to be used for manufacturing INA381EVM PCBs.
5.1
Schematics
Figure 1
through
Figure 4
shows the schematics for the INA381EVM A1, A2, A3, and A4 devices,
respectively.
Figure 1. Schematic for A1 Device
Figure 2. Schematic for A2 Device
