CDCM6208
K2G SoC
100MHz
(CML)
TXN0
TXP0
RXN0
RXN0
PCIE_CLK_P/N
x1 Edge
Card Connector
TXP0
RXN0
RXP0
TXN0
100MHz
(HCSL)
Copyright © 2016, Texas Instruments Incorporated
System Description
31
SPRUI65A – April 2016 – Revised January 2018
Copyright © 2016–2018, Texas Instruments Incorporated
K2G General Purpose Evaluation Module (EVMK2G)
3.15 PCIe
The PCIe RX and TX pairs are connected to x1 PCIe edge card connector as shown in
. Clock
generator (CDCM6208) provides the 100-MHz reference clocks for the PCIe port of the processor and to
the daughter card that connects to the edge card connector.
Figure 20. PCIe Interface Block Diagram
3.16 Display Interface
The Display interface (DSS) is muxed between the LCD and the HDMI transmitter SiI9022A as shown in
. The DSS is muxed using two 32-bit buffers to connect to the LCD or the HDMI transmitter.
Either the LCD or the HDMI transmitter is enabled by switches SW13 and SW14:
•
for HDMI: SW13 and SW14 = ON
•
for LCD: SW13 and SW14 = OFF
3.16.1
LCD
The TFT LCD module (NHD-4.3-480272EF-ATXL-CTP) from Newhaven display can be plugged into the
40-pin FPC connector on the EVMK2G. The LCD backlight is driven by DC-DC boost-converter
TPS61081DRCT.
The LCD is not part of the EVMK2G kit, it should be purchased separately. More details of LCD
installation procedure is provided in
3.16.2
HDMI Transmitter
The EVMK2G supports HDMI interface with the HDMI transmitter SiI9022A. The HDMI signals are
terminated to a connector by way of an ESD protection device TPD12S016PWR. The HDMI interface is
controlled by I2C1 of the SoC. The HDMI signals consist of three differential pairs of data lines and one
differential pair of clock line.
The McASP2 is interfaced to the HDMI transmitter to support audio over HDMI and I2C1 for control.
McASP2TX is shared between the HDMI transmitter and the Audio Codec. The Audio MCLK for the HDMI
transmitter is derived from a 12.288-MHz Oscillator, U75, that is shared between the Audio Codec and the
HDMI transmitter (See