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Copyright © 2016, Texas Instruments Incorporated
K2G SoC
EEPROM
AT24CM01
EEPROM_WP
WP
I2C2_SDA
I2C2_SCL
3.3 V
SCL
SDA
BMC
Copyright © 2016, Texas Instruments Incorporated
RESET#
QSPI FLASH
S25FL512S
K2G SoC
AND GATE
SOC_RESETSTAT
QSPI_RSTn
QSPI_RCLK
QSPI_D3
QSPI_D0
QSPI_CSn0
QSPI_CLK
QSPI_D1
QSPI_D2
I/O1
CS#
SCK
I/O3
I/O2
I/O0
3.3 V
BMC
System Description
27
SPRUI65A – April 2016 – Revised January 2018
Copyright © 2016–2018, Texas Instruments Incorporated
K2G General Purpose Evaluation Module (EVMK2G)
3.10 Quad SPI (QSPI) Flash
The Quad SPI (QSPI) Flash is a 512-Mbit device (S25FL512S) from Spansion interfaced as shown in
. The reset signal for the QSPI Flash is connected to the BMC. The Quad SPI Flash is interfaced
to chip select 0 of the QSPI interface on the processor.
Figure 14. Quad SPI (QSPI) Flash Block Diagram
3.11 EEPROM
The Atmel AT24CM01 provides 1Mb of Serial Electrically-Erasable and Programmable Read-Only
Memory (SEEPROM). This is interfaced to I2C0 port of the processor as shown in
. The device
address is set by the two address pins A1 and A2 that are connected to ground to give a 7-bit address
0x50. The Write protect pin of the EEPROM is connected to a GPIO of the BMC.
Figure 15. EEPROM Interface Block Diagram