1
3
5
7
9
11
13
2
4
6
8
10
12
14
TDO/TDI
TDI/VPP
TMS
TCK
GND
TEST/VPP
JTAG
VCC TOOL
VCC TARGET
J1 (see Note A)
J2 (see Note A)
V
CC
R1
47 k
W
(see Note B)
C2
10 µF
C3
0.1 µF
V /AV /DV
CC
CC
CC
RST/NMI
TDO/TDI
TDI/VPP
TMS
TCK
TEST/VPP (see Note C)
V /AV /DV
SS
SS
SS
MSP430Fxxx
C1
10 nF/1.1 nF
(see Notes B and E)
RST (see Note D)
Important to connect
A. If a local target power supply is used, make connection J1. If power from the debug or programming adapter is used, make connection
J2.
B. The configuration of R1 and C1 for the RST/NMI pin depends on the device family. See the respective MSP430 family user's guide for
the recommended configuration.
C. The TEST pin is available only on MSP430 family members with multiplexed JTAG pins. See the device-specific data sheet to determine
if this pin is available.
D. The connection to the JTAG connector RST pin is required when programming or debugging a device that supports 2-wire JTAG
communication, even when using 4-wire JTAG communication mode on these devices. However, this connection is optional on devices
that do not support 2-wire JTAG communication.
E. When using a device that supports 2-wire JTAG communication in 4-wire JTAG mode, the upper limit for C1 should not exceed 2.2 nF.
The typical value for SBW communication is shown. The range can vary between 0.1 nF and 2.2 nF depending on SBW speed, voltage,
and board design. See the device-specific data sheet for device-specific recommendations.
F. For extra ESD protection on the TEST pin, a 500ohm to 1k ohm pull down resistor can be added
Figure 2-1. Signal Connections for 4-Wire JTAG Communication
Design Considerations for In-Circuit Programming
SLAU278AG – MAY 2009 – REVISED DECEMBER 2020
MSP430™ Hardware Tools
21
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