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SNLU220 – December 2016
Copyright © 2016, Texas Instruments Incorporated
Using the DS90UB934-Q1EVM Evaluation Module
20
Top Overlay
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21
Top Solder
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Top Layer 1
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Layer 2
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Layer 3
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Layer 4
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Layer 5
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Bottom Layer 6
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Bottom Solder
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Bottom Overlay
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List of Tables
1
Power Supply
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2
POC Power Supply Feed Configuration
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3
Parallel LVCMOS Output Signals - J7 Pinout
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4
FPD-Link III Signals
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5
IDx I
2
C Device Address Select - J34
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6
I
2
C Interface Header - J4
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7
VDDIO Interface Header - J1
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8
GPIO Interface Header - J2
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9
CMLOUTP Output Signals
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10
Mode SW-DIP4 - S1
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11
Control SW-DIP4 - SW1
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12
LEDs
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