Texas Instruments DS320PR412-421EVM, Руководство пользователя, Страница: 5 / 31

2.4 Redriver-Mux Equalization Control
Each channel of the DS320PR412, DS320PR421, SN75LVPE5412 and SN75LVPE5421 features a continuous-
time linear equalizer (CTLE) that applies high-frequency boost and low-frequency attenuation to help equalize
the frequency-dependent insertion loss effects of the passive channel.
Table 2-4 shows available equalization
boost index through EQ control pins (EQ1 and EQ0) for all channels when in Pin Control mode (MODE = L0).
Please refer to data sheet for actual EQ Gain values.
Table 2-4. Equalization Control Settings
EQ INDEX EQ1 PIN LEVEL EQ0 PIN LEVEL
0 L0 L0
1 L0 L1
2 L0 L2
3 L0 L3
4 L0 L4
5 L1 L0
6 L1 L1
7 L1 L2
8 L1 L3
9 L1 L4
10 L2 L0
11 L2 L1
12 L2 L2
13 L2 L3
14 L2 L4
15 L3 L0
16 L3 L1
17 L3 L2
18 L3 L3
19 L3 L4
The equalization gain of each channel of each device can also be set by writing to SMBus / I2C registers in I2C
Mode.
2.5 Redriver-Mux RX Detect State Machine
Each DS320PR412, DS320PR421, SN75LVPE5412 and SN75LVPE5421 deploys an RX Detect state machine
that governs the RX detection cycle as defined in the PCI Express specification. At power up or after a manually
triggered event, the redriver determines whether or not a valid PCI Express termination is present at the far
end of the link. The RX_DET/SCL pin of DS320PR412, DS320PR421, SN75LVPE5412 and SN75LVPE5421
provides additional flexibility to system designers to appropriately set the device in their desired mode, according
to
Table 2-5 .
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SNLU301 – NOVEMBER 2021
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DS320PR412-421EVM User's Guide 5
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