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4 Schematics

Figure 4-1

 through 

Figure 4-8

 illustrate the EVM schematics.

SCL

SCL

SDA

SDA

RX_DET

RX_DET

PWDN

PWDN

PET0_P
PET0_N
PET1_P
PET1_N
PET2_P
PET2_N
PET3_P
PET3_N

PET0_C_P
PET0_C_N
PET1_C_P
PET1_C_N
PET2_C_P
PET2_C_N
PET3_C_P
PET3_C_N

PET4_P
PET4_N
PET5_P
PET5_N
PET6_P
PET6_N
PET7_P
PET7_N

PET4_C_P
PET4_C_N
PET5_C_P
PET5_C_N
PET6_C_P
PET6_C_N
PET7_C_P
PET7_C_N

PET8_P
PET8_N
PET9_P
PET9_N
PET10_P
PET10_N
PET11_P
PET11_N

PET8_C_P
PET8_C_N
PET9_C_P
PET9_C_N

PET10_C_P
PET10_C_N
PET11_C_P
PET11_C_N

PET12_P
PET12_N
PET13_P
PET13_N
PET14_P
PET14_N
PET15_P
PET15_N

PET12_C_P
PET12_C_N
PET13_C_P
PET13_C_N
PET14_C_P
PET14_C_N
PET15_C_P
PET15_C_N

PWDN

SCL

SDA

RX_DET

READ_EN_N

ALL_DONE_N_DS

MODE

DS160PR810_2x_DS
HSDC081A_2x_DS.SchDoc

PER0_P
PER0_N

PER0_C_P
PER0_C_N
PER1_C_P
PER1_C_N
PER2_C_P
PER2_C_N
PER3_C_P
PER3_C_N
PER4_C_P
PER4_C_N
PER5_C_P
PER5_C_N
PER6_C_P
PER6_C_N
PER7_C_P
PER7_C_N
PER8_C_P
PER8_C_N
PER9_C_P
PER9_C_N
PER10_C_P
PER10_C_N
PER11_C_P
PER11_C_N
PER12_C_P
PER12_C_N
PER13_C_P
PER13_C_N
PER14_C_P
PER14_C_N
PER15_C_P
PER15_C_N

PER1_P
PER1_N
PER2_P
PER2_N
PER3_P
PER3_N
PER4_P
PER4_N
PER5_P
PER5_N
PER6_P
PER6_N
PER7_P
PER7_N
PER8_P
PER8_N
PER9_P
PER9_N

PER10_P
PER10_N
PER11_P
PER11_N
PER12_P
PER12_N
PER13_P
PER13_N
PER14_P
PER14_N
PER15_P
PER15_N

PWDN

SCL

SDA

RX_DET

ALL_DONE_N_DS

ALL_DONE_N

MODE

DS160PR810_2x_US
HSDC081A_2x_US.SchDoc

READ_EN_N

ALL_DONE_N_DS

ALL_DONE_N_DS

CoverSheet
HSDC081A_CoverSheet.SchDoc

Hardware
HSDC081A_Hardware.SchDoc

PGOOD

VoltageRegulator
HSDC081A_VoltageRegulator.SchDoc

PGOOD

JTAG2
JTAG3
JTAG4
JTAG5

PERST#

REFCLK_P
REFCLK_N

PER0_C_P
PER0_C_N

RSVD1

PER1_C_P

PER2_C_P
PER2_C_N
PER3_C_P
PER3_C_N

RSVD3
RSVD4

PER4_C_P
PER4_C_N
PER5_C_P
PER5_C_N
PER6_C_P
PER6_C_N
PER7_C_P
PER7_C_N

RSVD5

PER8_C_P
PER8_C_N
PER9_C_P
PER9_C_N

PER10_C_P
PER10_C_N
PER11_C_P
PER11_C_N
PER12_C_P
PER12_C_N
PER13_C_P
PER13_C_N
PER14_C_P
PER14_C_N
PER15_C_P
PER15_C_N

PER1_C_N

PRSNT1

SMCLK
SMDAT

JTAG1

WAKE
CLKREQ

PET0_P
PET0_N

PRSNT2_1

PET1_P
PET1_N
PET2_P
PET2_N
PET3_P
PET3_N

RSVD2

PRSNT2_2

PET4_P
PET4_N
PET5_P
PET5_N
PET6_P
PET6_N
PET7_P
PET7_N

PRSNT2_3

PET8_P
PET8_N
PET9_P
PET9_N

PET10_P
PET10_N
PET11_P
PET11_N
PET12_P
PET12_N
PET13_P
PET13_N
PET14_P
PET14_N
PET15_P
PET15_N

PRSNT2_4

RSVD

GoldFinger_Conn
HSDC081A_GoldFinger_Conn.SchDoc

PRSNT1

JTAG2
JTAG3
JTAG4
JTAG5

PERST#

REFCLK_P
REFCLK_N

PER0_P
PER0_N

RSVD1

PER1_P
PER1_N
PER2_P
PER2_N
PER3_P
PER3_N

RSVD3
RSVD4

PER4_P
PER4_N
PER5_P
PER5_N
PER6_P
PER6_N
PER7_P
PER7_N
PER8_P
PER8_N
PER9_P
PER9_N
PER10_P
PER10_N
PER11_P
PER11_N
PER12_P
PER12_N
PER13_P
PER13_N
PER14_P
PER14_N
PER15_P
PER15_N

SMCLK
SMDAT

JTAG1

WAKE

CLKREQ

PET0_C_P
PET0_C_N

PRSNT2_1_C

PET1_C_P
PET1_C_N
PET2_C_P
PET2_C_N
PET3_C_P
PET3_C_N

RSVD2

PRSNT2_2_C

PET4_C_P
PET4_C_N
PET5_C_P
PET5_C_N
PET6_C_P
PET6_C_N
PET7_C_P
PET7_C_N

PRSNT2_3_C

PET8_C_P
PET8_C_N
PET9_C_P
PET9_C_N
PET10_C_P
PET10_C_N
PET11_C_P
PET11_C_N
PET12_C_P
PET12_C_N
PET13_C_P
PET13_C_N
PET14_C_P
PET14_C_N
PET15_C_P
PET15_C_N

PRSNT2_4_C

RSVD

RSVD5

Straddle_Conn
HSDC081A_Straddle_Conn.SchDoc

MODE

SDA

SCL

PWDN

READ_EN_N

SMDAT
SMCLK

ALL_DONE_N

PGOOD

PRSNT1

PRSNT2_1_C

PRSNT2_1

PRSNT2_2_C

PRSNT2_2

PRSNT2_3_C

PRSNT2_3

PRSNT2_4_C

PRSNT2_4

RX_DET

Control_Status
HSDC081A_Control_Status.SchDoc

PWDN

MODE

SCL

SDA

READ_EN_N
ALL_DONE_N

SMDAT
SMCLK

PRSNT1
PRSNT2_1
PRSNT2_2
PRSNT2_3
PRSNT2_4

PRSNT2_1_C
PRSNT2_2_C
PRSNT2_3_C
PRSNT2_4_C

PERST#

REFCLK_P
REFCLK_N

SMCLK
SMDAT

WAKE
CLKREQ

JTAG1
JTAG2
JTAG3
JTAG4
JTAG5

RSVD
RSVD1
RSVD2
RSVD3
RSVD4
RSVD5

PRSNT1
PRSNT2_1
PRSNT2_2
PRSNT2_3
PRSNT2_4

PERST#

REFCLK_P
REFCLK_N

SMCLK
SMDAT

WAKE
CLKREQ

JTAG1
JTAG2
JTAG3
JTAG4
JTAG5

RSVD
RSVD1
RSVD2
RSVD3
RSVD4
RSVD5

PRSNT1
PRSNT2_1_C
PRSNT2_2_C
PRSNT2_3_C
PRSNT2_4_C

PET0_P
PET0_N
PET1_P
PET1_N
PET2_P
PET2_N
PET3_P
PET3_N
PET4_P
PET4_N
PET5_P
PET5_N
PET6_P
PET6_N
PET7_P
PET7_N
PET8_P
PET8_N
PET9_P
PET9_N
PET10_P
PET10_N
PET11_P
PET11_N
PET12_P
PET12_N
PET13_P
PET13_N
PET14_P
PET14_N
PET15_P
PET15_N

PET0_C_P
PET0_C_N
PET1_C_P
PET1_C_N
PET2_C_P
PET2_C_N
PET3_C_P
PET3_C_N
PET4_C_P
PET4_C_N
PET5_C_P
PET5_C_N
PET6_C_P
PET6_C_N
PET7_C_P
PET7_C_N
PET8_C_P
PET8_C_N
PET9_C_P
PET9_C_N
PET10_C_P
PET10_C_N
PET11_C_P
PET11_C_N
PET12_C_P
PET12_C_N
PET13_C_P
PET13_C_N
PET14_C_P
PET14_C_N
PET15_C_P
PET15_C_N

PER0_C_P
PER0_C_N
PER1_C_P
PER1_C_N
PER2_C_P
PER2_C_N
PER3_C_P
PER3_C_N
PER4_C_P
PER4_C_N
PER5_C_P
PER5_C_N
PER6_C_P
PER6_C_N
PER7_C_P
PER7_C_N
PER8_C_P
PER8_C_N
PER9_C_P
PER9_C_N
PER10_C_P
PER10_C_N
PER11_C_P
PER11_C_N
PER12_C_P
PER12_C_N
PER13_C_P
PER13_C_N
PER14_C_P
PER14_C_N
PER15_C_P
PER15_C_N

PER0_P
PER0_N
PER1_P
PER1_N
PER2_P
PER2_N
PER3_P
PER3_N
PER4_P
PER4_N
PER5_P
PER5_N
PER6_P
PER6_N
PER7_P
PER7_N
PER8_P
PER8_N
PER9_P
PER9_N
PER10_P
PER10_N
PER11_P
PER11_N
PER12_P
PER12_N
PER13_P
PER13_N
PER14_P
PER14_N
PER15_P
PER15_N

ALL_DONE_N

RX_DET

MODE

MODE

2x DS160PR810 (Downstream)

2x DS160PR810 (Upstream)

Figure 4-1. Top Level Schematic Page

www.ti.com

Schematics

SNLU273 – DECEMBER 2020

Submit Document Feedback

DS160PR810EVM-RSC Evaluation Module (EVM)

13

Copyright © 2020 Texas Instruments Incorporated

Содержание DS160PR810EVM-RSC

Страница 1: ...ototyping Figure 1 1 DS160PR810EVM RSC Top Side View Table of Contents 1 Introduction 2 1 1 Features 2 1 2 Applications 2 2 Description 3 2 1 DS160PR810 4 Level I O Control Inputs 3 2 2 DS160PR810 Mod...

Страница 2: ...mount connector attached to the other end of the board 1 1 Features PCIe x16 Riser Card option with four 8 channel unidirectional linear redrivers operating at rates up to 25 Gbps Linear equalization...

Страница 3: ...D L1 13 k to GND L2 59 k to GND L3 Float 2 2 DS160PR810 Modes of Operation Each DS160PR810 can be configured to operate in either Pin Mode SMBus with I2C Slave Mode or SMBus with I2C Master Mode The m...

Страница 4: ...ssigned to the device by placing external resistor straps on the EQ0_0 ADDR1 and EQ1_0 ADDR0 pins as shown in Table 2 3 When multiple DS160PR810 devices are on the same SMBus interface bus each channe...

Страница 5: ...EQ INDEX EQ1 PIN LEVEL EQ0 PIN LEVEL CTLE BOOST AT 4 GHz dB CTLE BOOST AT 8 GHz dB 0 L0 L0 0 25 0 5 1 L0 L1 2 0 4 0 2 L0 L2 2 5 5 0 3 L0 L3 3 0 6 0 4 L1 L0 4 0 7 0 5 L1 L1 4 5 7 5 6 L1 L2 5 0 8 0 7 L1...

Страница 6: ...detections L L2 PCI Express RX detection state machine is enabled Recommended for PCI Express use cases Pre Detect Hi Z Post Detect 50 Outputs poll every approximate 150 s until 2 consecutive valid R...

Страница 7: ...Tie PCIe system PRSNT signal to PWDN using J6 for the PWDN control optional for PCIe use case J5 3x1 Header Access point to the WP write protect pin of the onboard EEPROM devices WP tied to GND I2C A...

Страница 8: ...ring EQ0_1 pin of Bank 1 of DS1 device Use pins 13 18 for configuring EQ0_0 pin of Bank 0 of DS2 device Use pins 19 24 for configuring EQ0_1 pin of Bank 1 of DS2 device SMBus I2C Modes ADDR0 controls...

Страница 9: ...n of Bank 1 of US1 device Use pins 13 18 for configuring EQ0_0 pin of Bank 0 of US2 device Use pins 19 24 for configuring EQ0_1 pin of Bank 1 of US2 device SMBus I2C Modes ADDR0 controls for each upst...

Страница 10: ...ts in the following arrangement On J15 connector place shunts in L0 locations for all downstream devices DS1_0 and DS2_0 DS1_1 and DS2_1 are a Don t Care On J16 connector place shunts in L0 locations...

Страница 11: ...2 1 SigCon Architect DS160PR810 High Level Page www ti com Description SNLU273 DECEMBER 2020 Submit Document Feedback DS160PR810EVM RSC Evaluation Module EVM 11 Copyright 2020 Texas Instruments Incorp...

Страница 12: ...ver EVM 10 WHQGHU DUG Server Motherboard PCIe Gen 4 CPU 8 WHQGHU DUG 6 WHQGHU DUG Figure 3 1 Example Test Setup Figure 3 2 is a typical test result achieved with a system shown in Figure 3 1 As the re...

Страница 13: ..._P PER4_N PER5_P PER5_N PER6_P PER6_N PER7_P PER7_N PER8_P PER8_N PER9_P PER9_N PER10_P PER10_N PER11_P PER11_N PER12_P PER12_N PER13_P PER13_N PER14_P PER14_N PER15_P PER15_N SMCLK SMDAT JTAG1 WAKE C...

Страница 14: ...2 PRSNT2_3_C PRSNT2_3 PRSNT2_4_C PRSNT2_4 PWDN SDA SCL SDA SCL GND 1 2 3 4 5 6 7 8 9 10 J3 SW1 4 70k R11 J6 1 2 3 J4 1 2 3 J7 1 2 3 J8 1 2 3 J9 1 2 3 J10 GND 3_3V_REG 3_3V_REG 3_3V_REG 3_3V_REG 3_3V_R...

Страница 15: ...FSEL 32 VSEL 33 MODE 34 PGOOD 35 ILIM 36 RESV_TRK 37 RSN 38 RSP 39 VOSNS 40 PAD 41 TPS548B22RVFR U3 100uF C11 100uF C10 10 0k R27 5 76k R28 100k R21 105k R25 165k R20 37 4k R22 42 2k R24 2 05k R26 6 8...

Страница 16: ...3 R91 RSVD2 1pF C63 43 R92 1pF C64 43 R93 RSVD4 1pF C70 43 R94 RSVD 1pF C71 43 R95 CLKREQ 1pF C72 43 R96 PRSNT2_1 1pF C73 43 R97 RSVD1 1pF C54 43 R87 PRSNT2_2 1pF C55 43 R88 PRSNT2_3 1pF C56 43 R89 PR...

Страница 17: ...T6_C_N PET7_C_P PET7_C_N 3_3V_REG MODE GAIN_DS PWDN PWDN READ_EN_N 3_3V_REG 4 70k R32 ALL_DONE_N_DS1 GAIN0_SDA_DS1 RX_DET_SCL_DS1 GAIN0_SDA_DS1 GAIN_DS SDA RX_DET_SCL_DS1 RX_DET SCL EQ1_0_AD1_DS1 EQ0_...

Страница 18: ..._US PWDN PWDN 3_3V_REG 4 70k R61 ALL_DONE_N_US1 GAIN0_SDA_US1 RX_DET_SCL_US1 EQ1_0_AD1_US1 EQ0_0_AD0_US1 EQ1_1_US1 EQ0_1_US1 ALL_DONE_N_DS 3_3V_REG VCC 6 VCC 18 VCC 38 VCC 50 RX0N 2 RX0P 1 RX1N 5 RX1P...

Страница 19: ...N PET11_C_P PET11_C_N PET12_C_P PET12_C_N PET13_C_P PET13_C_N PET14_C_P PET14_C_N PET15_C_P PET15_C_N PRSNT2_4_C RSVD RSVD5 12V 3_3V 12V 3_3V 3_3VAUX GND GND GND GND GND GND GND GND GND GND GND GND GN...

Страница 20: ...ified Variant Label Table Variant Label Text 001 DS160PR810EVM RSC LOGO PCB FCC disclaimer LOGO PCB WEEE logo SH J8 SH J1 SH J6 SH J4 SH J2 SH J5 SH J7 SH J3 SH J14 SH J9 SH J15 SH J10 SH J16 SH J11 S...

Страница 21: ...and Figure 5 2 illustrate the EVM board layouts Figure 5 1 Top Layer www ti com Schematics SNLU273 DECEMBER 2020 Submit Document Feedback DS160PR810EVM RSC Evaluation Module EVM 21 Copyright 2020 Texa...

Страница 22: ...Figure 5 2 Bottom Layer Schematics www ti com 22 DS160PR810EVM RSC Evaluation Module EVM SNLU273 DECEMBER 2020 Submit Document Feedback Copyright 2020 Texas Instruments Incorporated...

Страница 23: ...00 uF 6 3 V 20 X5R 0805 0805 GRM21BR60J107M MuRata C12 1 47uF CAP CERM 47 uF 6 3 V 20 X5R 0805 0805 GRM219R60J476ME44D MuRata C13 1 10uF CAP CERM 10 uF 6 3 V 10 X5R 0805 0805 C0805C106K9PAC Kemet C14...

Страница 24: ...Fastener Supply J1 J2 J14 J21 4 Header 100mil 3x2 Gold TH 3x2 Header TSW 103 07 G D Samtec J3 1 Header 100mil 5x2 Gold TH 5x2 Header TSW 105 07 G D Samtec J4 J5 J7 J8 J9 J10 J17 J18 J19 J20 J24 J25 J2...

Страница 25: ...0402 0402 CRCW040242K2FKED Vishay Dale R25 1 105k RES 105 k 1 0 063 W AEC Q200 Grade 0 0402 0402 CRCW0402105KFKED Vishay Dale R26 1 2 05k RES 2 05 k 1 0 063 W AEC Q200 Grade 0 0402 0402 CRCW04022K05FK...

Страница 26: ...Gate With 3 State Outputs PW0014A LARGE T and R PW0014A SN74LVC125APWRG3 Texas Instruments U3 1 1 5 V to 16 V VIN 4 5 V to 22 V VDD 25 A SWIFT Synchronous Step Down Converter with Full Differential S...

Страница 27: ...160PR810 Programming Guide 3 Texas Instruments Understanding EEPROM Programming for DS160PR810 PCI Express 4 0 Linear Redriver 4 Texas Instruments CEM2SLIMSAS EVM Evaluation Module EVM User s Guide ww...

Страница 28: ...ther than TI b the nonconformity resulted from User s design specifications or instructions for such EVMs or improper system design or c User has not paid on time Testing and other quality control tec...

Страница 29: ...These limits are designed to provide reasonable protection against harmful interference in a residential installation This equipment generates uses and can radiate radio frequency energy and if not in...

Страница 30: ...instructions set forth by Radio Law of Japan which includes but is not limited to the instructions below with respect to EVMs which for the avoidance of doubt are stated strictly for convenience and s...

Страница 31: ...any interfaces electronic and or mechanical between the EVM and any human body are designed with suitable isolation and means to safely limit accessible leakage currents to minimize the risk of electr...

Страница 32: ...R DAMAGES ARE CLAIMED THE EXISTENCE OF MORE THAN ONE CLAIM SHALL NOT ENLARGE OR EXTEND THIS LIMIT 9 Return Policy Except as otherwise provided TI does not offer any refunds returns or exchanges Furthe...

Страница 33: ...e resources are subject to change without notice TI grants you permission to use these resources only for development of an application that uses the TI products described in the resource Other reprod...

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