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SNLU158A – January 2014 – Revised January 2016

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Copyright © 2014–2016, Texas Instruments Incorporated

DS125DF111EVM Evaluation Board

(1)

A floating ADDR[1:0] pin at power-up will be interpreted as a logic 0.

Table 5. SMBus Write Address Assignment

(1)

ADDR1

ADDR0

SMBus Write

SMBus Read

0

0

0x30

0x31

0

1

0x32

0x33

1

0

0x34

0x35

1

1

0x36

0x37

5.2.1

Register Architecture and Bit Fields

There are two types of device registers in the DS125DF111. These are the Control/Share Registers and
the Channel Registers. The Control/Share Registers control or allow observation of settings which affect
the operation of all channels of the DS125DF111. They are also used to select which channel of the
device is to be the target channel for reads from and writes to the Channel Registers.

The Channel Registers are used to set all the configuration settings of the DS125DF111. They provide
independent control for each channel of the DS125DF111 for all the configurable device characteristics.
Any registers not described in the datasheet tables should be treated as Reserved. The user should not
try to write new values to these registers. The user-accessible registers described in the datasheet provide
a complete capability for customizing the operation of the DS125DF111 on a channel-by-channel basis.

Many of the registers in the DS125DF111 are divided into bit fields. This allows a single register to serve
multiple purposes, which may be unrelated. Often configuring the DS125DF111 requires writing a bit field
that makes up only part of a register value while leaving the remainder of the register value unchanged.

5.2.2

Using SigCon Architect

SigCon Architect can be used to program the DS125DF111EVM. In order to use SigCon Architect for
SMBus Slave Mode access control, a DPS-DONGLE-EVM (see

SNLU184

) or USB2ANY equivalent

adapter board must be used. This adapter board serves as an interface board to allow SMBus
communication between the PC and the DS125DF111 retimer. The SigCon Architect GUI features high
level control, low level register bit level control, and an Eye Monitor page to program the device. Examples
of these pages are shown in the following figures.

Figure 5. DS125DF111 High Level Page

Содержание DS125DF111EVM

Страница 1: ...DS125DF111EVM Evaluation Board User s Guide Literature Number SNLU158A January 2014 Revised January 2016...

Страница 2: ...exas Instruments Incorporated Table of Contents Contents 1 Overview 4 2 Features 5 3 Applications 5 4 Ordering Information 5 5 Setup 6 5 1 Pin Control Mode 6 5 2 SMBus Slave Mode 9 5 3 EEPROM Mode 12...

Страница 3: ...xDF111EVM Slave Mode Close Up 9 5 DS125DF111 High Level Page 10 6 DS125DF111 Low Level Page 11 7 DS125DF111 Eye Monitor Page 11 8 DS125DF111 EEPROM Hex File Generation Page 12 9 Top Assembly Layer 13...

Страница 4: ...ary 2016 DS125DF111EVM Evaluation Board 1 Overview The Texas Instruments DS125DF111EVM evaluation module provides a high bandwidth platform with an SMA interface to evaluate the DS125DF111 dual channe...

Страница 5: ...djustable Transmit VOD 600 to 1300 mVp p Settable Transmit De emphasis Driver to 12 dB Low Power Consumption 200 mW Channel Locks to Half Quarter Eighth Data Rates for Legacy Support On chip Eye Monit...

Страница 6: ...gn This EVM and documentation focus on Pin Control and SMBus Slave Mode to highlight the ease of use and excellent low jitter performance of the DS125DF111 5 1 Pin Control Mode In Pin Control Mode the...

Страница 7: ...OUTA and INB to OUTB 6 J91 VODA 1 k to GND L 600 mV output VOD on OUTA 7 J10 VODB 1 k to GND L 600 mV output VOD on OUTB 8 J41 DEMA 1 k to GND L 0 dB de emphasis on OUTA 9 J51 DEMB 1 k to GND L 0 dB d...

Страница 8: ...de ratios 1 and 2 For divide ratios 4 and 8 a pre set equalization level is used 5 1 4 Loopback J6 and J61 control the DS125DF111EVM loopback function according to Table 4 Table 4 DS125DF111 Loopback...

Страница 9: ...V supply to this pin 4 Floating the AD 1 0 inputs will result in an SMBus address 00 30 h 5 J3 ENSMB H SMBus Slave Mode 6 Connect the board signals SDA SCL and GND on J20 to a DPS DONGLE EVM or an eq...

Страница 10: ...s Any registers not described in the datasheet tables should be treated as Reserved The user should not try to write new values to these registers The user accessible registers described in the datash...

Страница 11: ...Board Figure 6 DS125DF111 Low Level Page Figure 7 DS125DF111 Eye Monitor Page For more information about functions about SigCon Architect and the retimer profiles please reference the SigCon Architect...

Страница 12: ...startup settings from a programmed EEPROM in the 8 pin DIP socket U2 SigCon Architect can be used to generate an EEPROM Hex file by configuring the EEPROM page settings Figure 8 DS125DF111 EEPROM Hex...

Страница 13: ...125DF111EVM The EVM uses simple 100 mil headers to control the output signal integrity functions The DS125DF111EVM is very compact and low power The board traces have been designed for connection to s...

Страница 14: ...MA5 142 0771 821 SIG 1 GND 2 GND 3 GND 4 GND 5 R16 1K C11 0 22 R9 1K J41 WM6502 ND 1 2 R2 20K J3 WM6503 ND 1 2 3 J51 WM6502 ND 1 2 J4 WM6503 ND 1 2 3 C2 0 1u C7 0 1u J16 WM8121 ND 1 2 3 4 5 6 J9 WM650...

Страница 15: ...J3 J4 J5 J6 J9 J19 J20 CONN HEADER 3POS 100 VERT GOLD Molex 22 28 4033 2 J10 J16 CONN HEADER 6POS 100 STR TIN Molex 90131 0123 7 J14 J41 J51 J61 J91 J141 J161 CONN HEADER 2POS 100 VERT GOLD Molex 22 2...

Страница 16: ...uation Board 9 Example Waveforms With the default power up configuration the DS125DF111 is designed to lock to 12 288 9 8304 6 144 4 9152 3 072 2 4576 1 536 and 1 2288 Gbps encoded data The results in...

Страница 17: ...Waveforms 17 SNLU158A January 2014 Revised January 2016 Submit Documentation Feedback Copyright 2014 2016 Texas Instruments Incorporated DS125DF111EVM Evaluation Board Figure 12 10 3125 Gbps Rj Dj Ji...

Страница 18: ...and Ordering Information contents 5 Changed source formatting of Pin Control descriptions 6 Changed connection to reflect operation with SigCon Architect through the DPS DONGLE EVM adapter board 9 Ad...

Страница 19: ...are returned during the warranty period to the address designated by TI and that are determined by TI not to conform to such warranty If TI elects to repair or replace such EVM TI shall have a reasona...

Страница 20: ...transmitter has been approved by Industry Canada to operate with the antenna types listed in the user guide with the maximum permissible gain and required antenna impedance for each antenna type indic...

Страница 21: ...ified allowable ranges some circuit components may have elevated case temperatures These components include but are not limited to linear regulators switching transistors pass transistors current sens...

Страница 22: ...REMOVAL OR REINSTALLATION ANCILLARY COSTS TO THE PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES RETESTING OUTSIDE COMPUTER TIME LABOR COSTS LOSS OF GOODWILL LOSS OF PROFITS LOSS OF SAVINGS LOSS OF USE L...

Страница 23: ...sponsible for compliance with all legal regulatory and safety related requirements concerning its products and any use of TI components in its applications notwithstanding any applications related inf...

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