1 Introduction
is a 4.5-V to 60-V triple half-bridge gate driver IC for motor drive applications. The DRV8328
provides a bootstrap architecture to drive 3 high-side and 3 low-side N-channel MOSFETs with up to 1-A peak
source and 2-A peak sink current. The DRV8328 can also support up to 100% PWM duty cycle inputs with an
integrated trickle charge pump. All variants are in compact QFN packages with hardware configurations and
provide ultra-low sleep mode current. Additionally, variants offer a variety of optional features including a dead
time pin, overcurrent level pin, driver shutoff pin, and integrated LDO capable of driving 3.3 V and 80 mA. A
summary of the variants below can be seen in
.
Table 1-1. DRV8328 device variant names and descriptions (default of EVM in bold)
Device Name
LDO Output
DT pin and VDSLVL pin
PWM Mode
DRV8328A
N/A
Available
6x PWM
DRV8328B
N/A
Available
3x PWM
DRV8328C
3.3 V
N/A
6x PWM
DRV8328D
3.3 V
N/A
3x PWM
can be interfaced with the
microcontroller on the
in correspondence with the reference software to provide the algorithm to the DRV8328
to control the BLDC motor.
This document serves as a startup guide to supplement the DRV83 LAUNCHXL-F280049C BLDC
motor control demo kit. It also is intended to help engineers design, implement, and validate reference hardware
and software for the LaunchPad MCU and DRV8328. For step by step details on connecting the LAUNCHXL-
F2 DRV8328AEVM, refer to
.
Figure 1-1. DRV8328AEVM PCB Layout
Introduction
2
DRV8328xEVM User's Guide
SLVUCD3A – NOVEMBER 2021 – REVISED AUGUST 2022
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