Texas Instruments DRV602EVM2, Руководство пользователя, Страница: 7 / 18

5 Layout Recommendations
5.1 SGND and PGND Connections
6 DRV602EVM2 Performance
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Layout Recommendations
The SGND and GND pins of the DRV602 must be routed separately back to the decoupling capacitor in
order to facilitate proper device operation. If the SGND pins are connected directly to each other, the
device functions without risk of failure, but noise and THD performance can be reduced.
On the DRV602EVM2, a star ground routing pattern is used; the star point is located directly below the
DRV602 device itself.
This section discusses the DRV602EVM2 overall performance in key parametric areas. Table 4 through
Table 7 summarize the EVM specifications.
Note: All electrical and audio specifications are typical values.
Table 4. General Test Conditions
(1)
General Test Conditions Notes
Supply voltage 5.0 V
Load impedance 2.5 k
Ω
Input signal 1 kHz sine
Measurement filter AES17
(1)
These test conditions are used for all tests, unless otherwise specified.
Table 5. Electrical Data
Electrical Data Notes/Conditions
Output voltage, 2500
Ω
2.2 V
RMS
1 kHz, THD+N = 1%, T
A
= +25
°
C
Output voltage, 100 k
Ω
2.3 V
RMS
1 kHz, THD+N = 1%, T
A
= +25
°
C
1 kHz, V
O
= 2 mV
RMS
at 2.5 k
Ω
, including
Supply current < 20 mA
linear regulator and LED
1 kHz, V
O
= 2 V
RMS
at 2.5 k
Ω
, including
Supply current < 20 mA
linear regulator and LED
SLOU248A – December 2008 – Revised January 2009 DRV602EVM2 7
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