Texas Instruments DRA72 Series, Руководство пользователя, Страница: 29 / 39

VIN2A
VIN2A_D[23:10]
Mux
F
A1 B1
B2
VIN2A_D[23:10]
SoC
CBT16214
A1=B1 or A1=B2 or A1 = B3
B3
LI Camera
Connector
Expansion
Connector
VIN2A
VIN2A_D[13:10]
Ethernet
RGMII1, MDIO
RGMII1_TXC, _TXCTL, _TXD[3:0], _RXD, _RXCTL, _RXD[3:0]
MDIO_CLK, _D
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Signal Multiplex Logic
29 SPRUIB9 – December 2016
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DRA72x EVM CPU Board User's Guide
Mux F: Selects between Gig Ethernet, expansion, and combines with Mux E to support LI camera. The
selection is made using the IO expander #3, and bits P12 and P11, with the default set to Gig Ethernet.
The MDIO mux setting (shown in RED in Figure 16 ) is only used if RGMII0 port is not selected. Otherwise,
the MDIO function is provided by other pins. The mux selection for MDIO is automatic, based on the
RGMII0 mux setting.
Figure 16. Mux Diagram for VIN2A and RGMII1
4.6 RGMII0 and VIN1B Selection (Mux J)
Figure 17 is part of the SoC pinmux table for RGMII0. The SoC device supports additional functions not
shown in the table. The functions shown are intended to reflect those supported on the EVM. These
include:
• Gig Ethernet (RGMII0): TXC, TXCTL, TXD[3:0], RXC, RXCTL, RXD[3:0]
• Management Data I/O (MDIO): MCLK, D
• Video Input Port (VIN1B): CLK, HSYNC, VSYNC, DE, [7:0]
Figure 17. SoC Pinmux for RGMII0 and VIN1B