Registers
788
SPRUHI7A – December 2012 – Revised June 2016
Copyright © 2012–2016, Texas Instruments Incorporated
High-Definition Video Processing Subsystem (HDVPSS)
1.3.10.6 nf_reg5 Register (offset = 14h) [reset = 000000ADh]
nf_reg5 is shown in
and described in
.
Figure 1-469. nf_reg5 Register
31
30
29
28
27
26
25
24
Reserved
R-0h
23
22
21
20
19
18
17
16
Reserved
R-0h
15
14
13
12
11
10
9
8
Reserved
MAX_NOISE
R-0h
R/W-Ah
7
6
5
4
3
2
1
0
MAX_NOISE
NOISE_IIR_COEFFICIENT
R/W-Ah
R/W-Dh
LEGEND: R/W = Read/Write; R = Read only; W1toCl = Write 1 to clear bit;
-n
= value after reset
Table 1-383. nf_reg5 Register Field Descriptions
Bit
Field
Type
Reset
Description
31-9
Reserved
R
0h
8-4
MAX_NOISE
R/W
Ah
Max of the possible noise level.
3-0
NOISE_IIR_COEFFICIEN
T
R/W
Dh
Noise level IIR filter coefficient.