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VSYNC Transitioning Active Here Means Derived Field ID = 0
VSYNC
VSYNC
Transitioning
Here Means
Derived
Field ID = 1
VSYNC Should
Not Be
Transitioning
Near Here
HSYNC
PIXCLK
First Active HSYNC Cycle
Cfg_fid_skew_pos 1 =
number of cyles in post window
Post Window Programmable Up to
64 Cycles, Minimum 1
Pre Window Programmable
Up to 63 Cycles, Minimum 0
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153 SPRUHI7A – December 2012 – Revised June 2016
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High-Definition Video Processing Subsystem (HDVPSS)
1.2.8.2.5.7 Field ID Determination Using VSYNC Skew
In order to save a device pin, there is a case where a skew may be inserted into VSYNC (with respect to
HSYNC) when HSYNC is used as a start of line indicator as described in
Figure 1-97 . In this case, no
FIELD ID signal is sent by the source chip. A description of Field ID determination by VSYNC skew is
shown in
Figure 1-102 .
The active polarity of VSYNC falling within n pixel clock cycles of the first active cycle of HSYNC indicates
the field id. If VSYNC is active before this time window, then the field_id = ‘1’ for the next picture. If
VSYNC becomes active within this window, then field_id = ‘0’ for the next picture.
Figure 1-102. Field ID Determination By VSYNC Skew
When using FID determination by VSYNC skew, the value for VSYNC is also determined by transitions in
the window as shown in
Figure 1-99 .
The VIP Parser supports a configuration FID polarity bit. For FID determination by VSYNC Skew, the fid
determination functions as described in
Table 1-54 .
Table 1-54. Polarity Table for FID Determination By VSYNC Skew
Cfg_fid_polarity Transition in Pre/Post Range FID Determination
0 No 1
0 Yes 0
1 No 0
1 Yes 1