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EVM Software Overview

13

SBAU248 – November 2016

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Copyright © 2016, Texas Instruments Incorporated

DAC8775EVM User’s Guide

4.3

Device Controls

This section describes the GUI controls for the internal reference, power-on conditions, clear, software
reset, and DAC broadcast functionality.

4.3.1

Internal Reference

The internal reference can be enabled or disabled using the internal reference control on the EVM GUI. By
default, the internal reference is disabled.

4.3.2

Power-On Condition

By default the power-on state of the current output is Hi-Z and the voltage output is 30 k

Ω

to ground after

a clear or reset command. The power-on condition GUI control allows control of the voltage output power-
on condition as either 30 k

Ω

to ground or Hi-Z.

4.3.3

Software Reset

The RESET button on the GUI issues a software reset to the DAC8775, restoring the default power-on
register contents. The GUI immediately reads all of the registers of the device to synchronize the GUI and
hardware. A hardware reset can be issued through JP14. If a hardware issue is issued the READ ALL
button should be pressed to synchronize the GUI and hardware.

4.3.4

Software Clear

The CLEAR button on the GUI issues a clear command to the DAC8775, restoring the DAC data registers
to full-scale or zero-scale based on each channel’s clear select settings and clear enable settings. After a
clear command is issued the GUI immediately reads the data registers of the device to synchronize the
GUI and hardware. A hardware clear command can be issued through JP12. If a hardware clear is issued
the READ ALL button should be pressed to synchronize the GUI and hardware.

4.4

DAC Controls

4.4.1

DAC Outputs

The DACs can be configured for voltage or current outputs of various spans through the Output Mode
control on the GUI. The DAC output can be set to active or inactive by checking or removing the check
from the Output Enable Boolean control on the GUI. Once an output range is selected and the output is
enabled, the DAC output value can be controlled by writing values to the DAC Data control. The DAC
Data control expects hexadecimal input formats. The small indicator on the left side of the DAC Data
control can be used to change the input data format.

Output current drive can be programmatically limited for each of the voltage output modes through the
V

OUT

Current Limit control on the GUI. Take note that the actual current limit will be compliant to the values

specified in the DAC8775 electrical characteristics table.

4.4.2

Clear Functionality

Each DAC output has a Clear Enable Boolean that is AND’d with the CLEAR command. If the Clear
Enable Boolean is checked, the output channel will respond to a clear event; conversely, if the Boolean is
unchecked, the output channel will not respond to a clear event. Each DAC can be programmed to clear
to either zero-scale or full-scale. This behavior can be controlled by the Clear Select control on the GUI.

4.4.3

HART Inputs

The enable HART signals to be coupled to the current outputs through the onboard coupling path the
HART-Enable Boolean control must be checked.

Содержание DAC8775EVM

Страница 1: ...EVM Software Setup 10 4 EVM Software Overview 12 5 EVM Documentation 15 List of Figures 1 DAC8775EVM Hardware Setup 3 2 DAC8775EVM Block Diagram 3 3 PVDD AVDD AVSS and DVDD Supply Connections 6 4 Digi...

Страница 2: ...he contents of the EVM kit Contact the nearest Texas Instruments Product Information Center or visit the Texas Instruments E2E Community http E2E ti com if any component is missing Table 1 Contents of...

Страница 3: ...tes with the SM USB DIG platform which provides the power and digital signals used to communicate with the EVM board Connectors on the EVM board allow the user to connect the required external power s...

Страница 4: ...s PVDD AVDD to supply VPOSD JP8 1 2 1 2 Selects DC DC Channel D to supply VNEGD 2 3 Selects AVSS to supply VNEGD JP9 Not installed Installed Connects the SM USB DIG supply to DVDD Not installed Discon...

Страница 5: ...SEPC is shorted to VOUTA off board JP31 Installed Installed VSENSEPD is shorted to VOUTB onboard Not installed VSENSEPD is shorted to VOUTB off board JP32 Not installed Installed Loads VOUTC IOUTC wit...

Страница 6: ...negative supply for the output signal chain may be powered by the DAC8775 internal buck boost converters or by off board supply voltages WARNING Permanent device damage may occur if externally supplyi...

Страница 7: ...onfiguration take care to ensure that digital logic thresholds of the host and DAC8775 match and that the absolute maximum ratings of the DAC8775 are not violated 2 5 EVM Features This section describ...

Страница 8: ...NSEP_X and VSENSEN_X sense connections may be provided onboard or externally closer to the point of load through terminal blocks J5 J6 J7 or J8 To provide the VSENSEP_X connections onboard install JP1...

Страница 9: ...HART FSK communication signals onto the current outputs When injecting the HART signal remove JP28 JP29 JP42 or JP43 and apply the HART signal to pin 1 When a HART signal is not being injected install...

Страница 10: ...VDUT Switchable DUT power supply 3 3 V 5 V Hi Z disconnected Note When VDUT is Hi Z all digital I Os are Hi Z as well 7 SPI_CLK SPI clock signal SCLK 8 GND Power return GND 9 SPI_CS1 SPI chip select s...

Страница 11: ...e installation process initializes the user is given a choice of selecting the installation directory usually defaulting to C Program Files x86 DAC8775EVM and C Program Files x86 National Instruments...

Страница 12: ...EVM If this error happens first ensure that the USB cable is properly connected on both ends This error can also occur if the USB cable is connected before the SM USB DIG platform power source Another...

Страница 13: ...of the device to synchronize the GUI and hardware A hardware clear command can be issued through JP12 If a hardware clear is issued the READ ALL button should be pressed to synchronize the GUI and ha...

Страница 14: ...asheet 4 6 Slew Rate Controls The slew rate of each channel may be controlled by the slew control registers for each channel By default the slew rate control features are disabled To enable the slew r...

Страница 15: ...11 LP_B 12 PVDD_B 13 LN_A 14 PVSS_A 15 LP_A 16 PVDD_A 17 AGND_A 18 VNEG_IN_A 19 VNEG_IN_B 20 SCLK 21 SDIN 22 LDAC 23 SDO 24 SYNC 25 CLR 26 HARTIN_B 27 CCOMP_B 28 HARTIN_A 29 CCOMP_A 30 VSENSEP_B 31 V...

Страница 16: ...ND GND GND GND GND GND GND GND GND GND GND GND GND Copyright 2016 Texas Instruments Incorporated PVDD AVDD 100 H L1 AGND_A PVSS_A PVDD_A VPOS_IN_A LN_A LP_A VNEG_IN_A VNEG_IN_A 2k ohm FB1 2k ohm FB2 0...

Страница 17: ...ber 2016 Submit Documentation Feedback Copyright 2016 Texas Instruments Incorporated DAC8775EVM User s Guide 5 2 EVM PCB Components Layout Figure 15 shows the layout of the components for the EVM boar...

Страница 18: ...A SOD 123 MBRX160 TP Micro Commercial Components 12 D5 D6 D7 D8 D13 D14 D15 D16 D19 D20 D23 D24 Diode TVS Bi 36V 400W SOD323 2 Leads Body 1 9x1 45mm No Polarity Mark CDSOD323 T36SC Bourns 4 D17 D18 D2...

Страница 19: ...1 00 k 0 1 1 W 1206 resistor PHP01206E1001BST5 Vishay Dale 1 R39 RES 1 50 ohm 1 0 1W 0603 CRCW06031R50FKEA Vishay Dale 16 TP1 TP2 TP3 TP4 TP5 TP6 TP7 TP8 TP17 TP18 TP19 TP20 TP31 TP32 TP33 TP34 Test...

Страница 20: ...sponsible for compliance with all legal regulatory and safety related requirements concerning its products and any use of TI components in its applications notwithstanding any applications related inf...

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