EVM Hardware Overview
8
SLAU727 – August 2017
Copyright © 2017, Texas Instruments Incorporated
DAC8771 Evaluation Module
2.5.6
Applying HART Signals
JP9 is available to couple external HART FSK communication signals onto the current outputs. When
injecting the HART signal, remove JP9 and apply the HART signal to JP9 pin 1. When a HART signal is
not being injected, install JP9 with AC coupling the HART pins to ground.
2.6
Connecting the SM-USB-DIG
To connect the EVM board and the SM-USB-DIG platform together, firmly slide the male and female ends
of the 10-pin connectors together with the Texas Instruments logo of the SM-USB-DIG facing up as shown
in
. Make sure that the two connectors are completely pushed together as loose connections may
cause intermittent operation.
Figure 7. SM-USB-DIG Connection
2.7
Signal Definitions of J1 (10-Pin SM-USB-DIG Connector)
shows the pin-out for the 10-pin connector used to communicate between the EVM and the SM-
USB-DIG. Note that the I
2
C communication lines (I2C_SCL and I2C_SDA1) are not used.
Table 4. SM-USB-DIG Connector
Pin on J1
Signal
Description
1
I2C_SCL
I
2
C clock signal (SCL)
2
CTRL/MEAS4
GPIO: Control output or measure input
3
I2C_SDA1
I
2
C data signal (SDA)
4
CTRL/MEAS5
GPIO: Control output or measure input
5
SPI_DOUT1
SPI data output (MOSI)
6
VDUT
Switchable DUT power supply: 3.3 V, 5 V, Hi-Z
(disconnected).
Note: When VDUT is Hi-Z, all digital I/Os are Hi-Z as well
7
SPI_CLK
SPI clock signal (SCLK)
8
GND
Power return (GND)
9
SPI_CS1
SPI chip-select signal (!CS)
10
SPI_DIN1
SPI data input (MISO)