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DAC5668/88/89 Hardware Description
Table 3. Input and Output Connections (continued)
REFERENCE LABEL CONNECTOR DESCRIPTION
DESIGNATOR TYPE
J19 OUTCLK1 Y4B SMA Optional CDCM7005 clock output.
J20 EXT_VCXO SMA External main clock input.
J21 DAC CLKOUT SMA CLKOUT output from DAC.
J22 EXT_REF_CLK SMA External reference clock input.
J23 RF_LO_IN SMA TRF3703 LO source input.
4.3 USB Interface
The DAC5668/88/89EVM contains a USB connector to interface to a USB 1.1 or later compliant USB port.
Programming of the CDCM7005 and DAC is accomplished through this port.
4.4 Power Management
The DAC5668/88/89EVM requires 1.8-V and 3.3-V supplies for normal operation. An additional 5-V supply
is required to power up the TRF3703 for RF measurements.
4.5 Input Data
The DAC5668/88/89EVM can accept 1.8-V or 3.3-V CMOS logic levels data inputs through the 34-pin
headers J2 and J7 per
Table 4 and Table 5 . The board provides series dampening resistors to minimize
digital ringing and switching noise. The DAC logic level is selected through software.
Table 4. Input Data Connector J2 – Data A Bus
Pin Description Pin Description
1 CMOS data bit 15 (MSB) 18 GND
2 GND 19 CMOS data bit 6
3 CMOS data bit 14 20 GND
4 GND 21 CMOS data bit 5
5 CMOS data bit 13 22 GND
6 GND 23 CMOS data bit 4
7 CMOS data bit 12 24 GND
8 GND 25 CMOS data bit 3
9 CMOS data bit 11 26 GND
10 GND 27 CMOS data bit 2
11 CMOS data bit 10 28 GND
12 GND 29 CMOS data bit 1
13 CMOS data bit 9 30 GND
14 GND 31 CMOS data bit 0 (LSB)
15 CMOS data bit 8 32 GND
16 GND 33 SYNC
17 CMOS data bit 7 34 GND
Table 5. Input Data Connector J7 – Data B Bus
Pin Description Pin Description
1 CMOS data bit 0 (LSB) 18 GND
2 GND 19 CMOS data bit 9
3 CMOS data bit 1 20 GND
4 GND 21 CMOS data bit 10
5 CMOS data bit 2 22 GND
7 SLAU241A – June 2008 – Revised March 2010 DAC5668/88/89EVM
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