Introduction to PRBS Test
4
SLAA750 – July 2017
Copyright © 2017, Texas Instruments Incorporated
DAC38RF8x Test Modes
1.4
Configuring the DAC38RF8x
This procedure describes how to configure the DAC into the LMF = 841 mode with internal clocking. If a
different configuration is needed, follow a similar procedure and simply vary the values in
and
.
Step 1.
Launch the DAC38RF8x EVM GUI and select the
Quick Start
tab (see
Step 2.
Reset the board by clicking the
Not in RESET
button and then clicking the button again, after
the button changes, to bring the board back out of reset. Click the
LOAD DEFAULT
button to
load the default values into the registers.
Step 3.
Under the
DAC MODE
section, set
•
The
# of DACs
field to
Dual DAC
•
The
# of IQ pairs per DAC
to
1 IQ pair
•
The
# of SerDes lanes per DAC
field to
4 lanes
•
The
Desired Interpolation
field to
12x
Step 4.
In the
On-Chip PLL section
check the
PLL Enable
box. Set the
M
field to 6, the
N
field to 1,
and the multiplier to
368.64
. The
DAC Clock Frequency
box should automatically change to
8847.36 MHz. Click the
CONFIGURE DAC
button. After this configuration is complete, click
the
PLL AUTO TUNE
button. After this configuration is complete, click the
Reset DAC JESD
Core & SYSREF TRIGGER
button.
Figure 2. DAC38RF8x EVM GUI Quick Start Tab
Step 5.
Select the
DAC38RF8x
tab and navigate to the
Clocking
sub-tab (see
). The box
labeled
PLL LF Voltage
should be populated with a value from 2 to 6. If this value is correct,
the configuration and PLL tuning were performed correctly. Otherwise, verify that the contents
of the
Quick Start
tab are correct and repeat the previous steps.
