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Configuring the Board
Configuration for On-board External Loop Filter
If the CDCE62005 is configured as a jitter cleaner, it requires the use of the partially-external loop filter,
located on the bottom side of the CDCE62005EVM PC board. There are four external loop filter options
provided on the EVM. The external loop filter topology is as shown below.
The external loop filter can be chosen by selecting one from the four available options on the
CDCE62005EVM using the dip switches, SW9 and SW10, located at the bottom side of the EVM and
shown below.
Figure 11. External Loop Filter Selection Switches
Configuration for PLL Lock Detect
The CDCE62005 PLL lock detect can be chosen on the CDCE62005EVM as either an analog lock detect
or a digital lock detect using the jumper, JP_3_12, located at the back side of the CDCE62005EVM. This
jumper can be configured as shown in
for either analog or digital lock detect.
Figure 12. Lock Detect Select Jumper
SCAU024 – September 2008
Low Phase Noise Clock Evaluation Module — up to 1.5 GHz
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