Texas Instruments CDC7005, Руководство пользователя, Страница: 9 / 37

1-1 Introduction
Introduction
The CDC7005 is a high-performance, low phase noise and low skew clock
synchronizer that synchronizes an on-board voltage controlled crystal
oscillator (VCXO) frequency to an external reference clock. The device
operates up to 800 MHz. The PLL loop bandwidth and damping factor can be
adjusted to meet different system requirements by selecting the external
VCXO, loop filter components, frequency for PFD, and charge pump current.
Each of the five differential LVPECL outputs can be programmed by a serial
peripheral interface (SPI). The SPI allows individual control of the frequency
and enable/disable state of each output. As the system requires external
components like a loop filter and VCXO, this EVM provides an excellent way
to evaluate and modify the performance and parameters of the clock system
in conjunction with the specific customer application. Loop bandwidth can be
selected as low as 10 Hz or less, allowing this device to clean the system’s
clock jitter. The CDC7005 can be used as a simple 1:5 LVPECL buffer with
output dividing options.
Topic Page
1.1 CDC7005 Functional Block Diagram 1-2 . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Chapter 1