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3/13/2020
BMS021E3_bq79616.SchDoc
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bq7961x EVM
Project Title:
Designed for:
TI Confidential - NDA Restrictions
Assembly Variant:
003
© Texas Instruments
2019
Drawn By:
Engineer:
Taylor Vogt
Texas Instruments and/or its licensors do not warrant the accuracy or completeness of this specification or any information contained therein. Texas Instruments and/or its licensors do not
warrant that this design will meet the specifications, will be suitable for your application or fit for any particular purpose, or will operate in an implementation. Texas Instruments and/or its
licensors do not warrant that the design is production worthy. You should completely validate and test your design implementation to confirm the system functionality for your application.
Version control disabled
SVN Rev:
BMS021
Number:
Rev:
E3
TID #:
N/A
Orderable:
EVM_orderable
ALL DECOUPLING
CAPS ARE AS
CLOSE TO THE
CHIP AS POSSIBLE
GND tied to CELL0
at connector via a
thick trace.
GPIO6
GPIO7
GPIO8
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7
CB8
CB9
CB10
CB11
CB12
CB13
CB14
CB15
CB16
COMHP
COMHN
COMLP
COMLN
NFAULT
TX
RX
BBN
BBP
VC16
VC15
VC14
VC13
VC12
VC11
VC10
VC9
VC8
VC7
VC6
VC5
VC4
VC3
VC2
VC1
VC0
DVDD
CVDD
AVDD
REFHP
BAT
NPNB
LDOIN
NEG5V
TSREF
GPIO5
57
GPIO4
58
GPIO1
61
GPIO6
56
SRN
63
SRP
64
FAULT
62
GPIO7
55
GPIO2
60
GPIO3
59
VC14
7
CB13
8
VC12
11
CB14
6
VC11
13
CB10
14
CB11
12
VC15
5
CB12
10
VC13
9
VC9
17
CB8
18
VC7
21
CB9
16
VC6
23
CB5
24
CB6
22
VC10
15
CB7
20
VC8
19
REFHP
37
AVDD
38
COMLP
40
REFHM
36
COMHN
42
COMHP
43
COMLN
41
VC0
35
NEG5V
44
AVSS
39
LDOIN
47
NPNB
48
TSREF
51
CVSS
46
TX
53
GPIO8
54
RX
52
CVDD
45
DVSS
50
DVDD
49
VC4
27
CB3
28
VC2
31
CB4
26
VC1
33
CB0
34
CB1
32
VC5
25
CB2
30
VC3
29
BAT
1
VC16
3
CB15
4
CB16
2
PAD
65
BQ79656PAPQ1
U1
10nF
C5
GND
GND
1µF
C6
1µF
C9
4.7µF
C7
1µF
C8
1µF
C2
GND
GND
GND
GND
0.1uF
C3
GND
GND
VC0
VC1
VC2
VC3
VC4
VC5
VC6
VC7
VC8
VC9
VC10
VC11
VC12
VC13
VC14
VC15
VC16
CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7
CB8
CB9
CB10
CB11
CB12
CB13
CB14
CB15
CB16
COMHP
COMHN
COMLP
COMLN
PWR
30.0
R5
PWR
Green
1
2
D1
1
2
J6
GND
1.0k
R121
GND
LDOIN
100
R3
200
R4
0.22µF
C1
GND
PWR
NPN Power Supply
TP14
GND
GND
TP13
GND
DVDD
BBN
NFAULT
Test Points
TP1
TSREF
TP2
LDOIN
TP3
NEG5V
TP4
NPNB
TP5
CVDD
TP6
AVDD
TP7
REFHP
TP8
BAT
TP43
NFAULT
TP11
BBN
TP10
BBP
TP9
DVDD
BBN
BBP
402
R9
402
R12
0.47uF
C10
BBP_CELL
BBN_CELL
0
R24
DNP
0
R23
DNP
0
R28
DNP
0
R27
DNP
V
C
16
V
C
15
V
C
14
V
C
13
V
C
12
0
R22
DNP
0
R26
DNP
C
B
16
C
B
15
0
R21
DNP
0
R25
DNP
C
B
14
C
B
13
C
B
12
Resistors for Lower Cell Count
Applications (614, 612)
BBP/BBN Bus Bar
TP16
BBN_CELL
TP17
BBP_CELL
0
R13
DNP
0
R10
DNP
BBN
BBP
0.47uF
C11
TP19
SRN_S
TP18
SRP_S
SRP/SRN
Current Sense
GPIO8_R
GPIO5_R
GPIO6_R
GPIO7_R
GPIO4_R
GPIO3_R
GPIO2_R
GPIO1_C
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
J4
GPIO8
GPIO6
GPIO7
GPIO5
GPIO4
GPIO2
GPIO1
GPIO3
1
2
J5
TSREF
Jumpers to connect GPIOs to
resistor divider and thermistor for
temperature measurements.
Jumpers to connect TSREF to
ratiometric circuit.
Low side NTC circuit.
10k
t°
RT7
10k
t°
RT5
10k
t°
RT4
10k
t°
RT2
10k
t°
RT6
10k
t°
RT1
10k
t°
RT8
10k
t°
RT3
10.0k
R11
10.0k
R19
10.0k
R8
10.0k
R18
10.0k
R7
10.0k
R16
10.0k
R15
10.0k
R14
GND
PULLUP
PULLUP
GPIO1_R
GPIO2_R
GPIO3_R
GPIO4_R
GPIO5_R
GPIO6_R
GPIO7_R
GPIO8_R
GPIOs
1uF
C12
100k
R20
DNP
1
3
2
,4
Q2
DNP
NPNB
0
R17
DNP
2
3
1
Q1
NPNB
REFHP
BAT
BBP
AVDD
TSREF
LDOIN
NEG5V
NPNB
CVDD
GND
TP15
GND
GND
5
4
1
2
3
6
J3
J3 Pin Description
5 TX - to microcontroller UART RX
4 RX - to microcontroller UART TX
2 FAULTn - to microcontroller GPIO
1 GND - shared GND with microcontroller
UART Communication
1
2
J1
T
X
1
2
J2
100k
R2
CVDD
NFAULT
100k
R120
1
3
5
7
9
J17A
100
R119
R
X
_
C
2
4
6
8
1
0
J17B
J17 Pin Description
8 TX - to microcontroller UART RX
7 RX - to microcontroller UART TX
3 FAULTn - to microcontroller GPIO
5 GND - shared GND with microcontroller
0.1uF
C59
0.1uF
C4
GND
6 USB2ANY 3.3V
R
X
INA
3
INB
4
INC
12
IND
11
OUTA
14
OUTB
13
OUTC
5
OUTD
6
EN1
7
EN2
10
VCC1
1
VCC2
16
GND1
2
GND2
9
GND1
8
GND2
15
ISO7342CQDWRQ1
U2
GND_ISO
0.1uF
C57
0.1uF
C58
USB2ANY_TX_3.3
100k
R123
GND_ISO
1.0k
R128
GPIO1_R
TP42
TX
TP12
RX
CVDD
CVDD_CO
NFAULT_C
NFAULT_C
U
S
B
2
A
N
Y
_
T
X
_
3
.3
USB2ANY_3.3V
U
S
B
2
A
N
Y
_
3
.3
V
USB2ANY_RX_3.3
U
S
B
2
A
N
Y
_
R
X
_
3
.3
CVDD_CO
RX_CO
TX
NF_J
GND
GND_ISO
USB2ANY_3.3V
RX
TX
1
2
J18
GND
GND
1
2
J21
RX
1uF
C60
GND
TP44
GPIO1_R
24V
1
3
2
D3
NF_J
Figure 9-2. BQ79656EVM Schematic Part 1
BQ79656EVM Schematic, Assembly, Layout, and BOM
SLUUC37B – JULY 2019 – REVISED OCTOBER 2020
BQ79616-Q1, BQ75614-Q1, and BQ79656-Q1 Evaluation Modules
53
Copyright © 2020 Texas Instruments Incorporated