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1.3 Recommended Operating Conditions

Table 1-4. Recommended Operating Conditions

Description

MIN

TYP

MAX

Unit

V(VINx) at J1 or J2

Power supply voltage to the external blocking FETs 
which allow power to VBUS pin

6

24

V

I(INx) into J1 or J2

Power supply current, which can be limited by charger's 
input current limit feature (IINDPM)

0.01

3.3

A

V(BATTERY) voltage at J5 Battery voltage supported for pre charge

2.2

3.8(1S), 7.6(2S), 

11.4(3S), 15.2V(4S)

18.8

V

I(BATTERY) out of/into J5

Battery charge current

0.01

2 (1S, 2S), 1(3S, 4S)

3

A

V(SYS) at J3

System voltage regulation range

3.2

19

V

I(SYS) out of J3

System load current

0

5

A

Introduction

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6

BQ25672 Evaluation Module

SLUUCF3A – DECEMBER 2020 – REVISED OCTOBER 2021

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Содержание BMS034E1

Страница 1: ...of Contents 1 Introduction 3 1 1 EVM Features 3 1 2 I O Descriptions 4 1 3 Recommended Operating Conditions 6 2 Test Setup and Results 7 2 1 Equipment 7 2 2 Equipment Setup 7 2 3 Software Setup 8 2 4 Test Procedure 9 3 PCB Layout Guidelines 11 4 Board Layout Schematic and Bill of Materials 12 4 1 BMS034E1 Board Layout 12 4 2 BQ25672EVM BMS034E1 004 Schematic 16 4 3 Bill of Materials 18 5 Revision ...

Страница 2: ...s Microsoft and Windows are registered trademarks of Microsoft Corporation All trademarks are the property of their respective owners Trademarks www ti com 2 BQ25672 Evaluation Module SLUUCF3A DECEMBER 2020 REVISED OCTOBER 2021 Submit Document Feedback Copyright 2021 Texas Instruments Incorporated ...

Страница 3: ...ing the BQ25672 charger IC in the QFN package Key features of this EVM include Synchronous Switch Mode Buck Boost Charger for 1S 4S Battery Configuration for 3 A Charging with 10 mA Resolution Support for 6 V to 24 V Wide Range of Input Sources Dual Input Source Selector to Drive Bi Directional Blocking NFETs Power up USB Port from Battery USB OTG with 5 V to 12 V OTG Output Voltage with 10 mV Res...

Страница 4: ...n utilizing the input protection MOSFETs Connect this to GND when input protection MOSFETs are not utilized or bypassed ACDRV2 to _acdrv2 JP3 VIN1 VAC1 to VBUS bypass connection Connect this when the input protection MOSFET feature is not desired This will connect the input source on VIN1 to VBUS Not Installed JP4 VIN2 VAC2 to VBUS bypass connection Connect this when the input protection MOSFET fe...

Страница 5: ...2S charge regulation voltage 2 A charging current and 1 5 MHz switching frequency Installed JP25 PROG pin setting for 2S 750 kHz Connect to configure charger default setting to 2S charge regulation voltage 2 A charging current and 750 kHz switching frequency Not Installed JP26 PROG pin setting for 3S 1 5 MHz Connect to configure charger default setting to 3S charge regulation voltage 1 A charging ...

Страница 6: ... s input current limit feature IINDPM 0 01 3 3 A V BATTERY voltage at J5 Battery voltage supported for pre charge 2 2 3 8 1S 7 6 2S 11 4 3S 15 2V 4S 18 8 V I BATTERY out of into J5 Battery charge current 0 01 2 1S 2S 1 3S 4S 3 A V SYS at J3 System voltage regulation range 3 2 19 V I SYS out of J3 System load current 0 5 A Introduction www ti com 6 BQ25672 Evaluation Module SLUUCF3A DECEMBER 2020 R...

Страница 7: ... required when using the GUI Composer application PC Communication Interface EV2300 2400 USB Based PC Interface Board when using Battery Management Studio or USB2ANY interface adapter when using TI Charger GUI 2 2 Equipment Setup Use the following list to set up the EVM testing equipment Refer to Figure 2 1 for the test setup connections to the EVM 1 Review the EVM connections in Table 1 2 2 Set P...

Страница 8: ...and either download the BQZ file from the EVM product folder at www ti com or request the file via e2e ti com The file must be saved into C XXX BatteryManagementStudio config where XXX is the directory you selected to install BQSTUDIO 2 3 2 TI Charger GUI for USB2ANY Navigate to the TI CHARGER GUI tool folder Once at the tool page click on the Start Evaluation button The browser will automatically...

Страница 9: ...V On the Chip Configuration page below the Chip Configuration section Check the ShipFET Present box 2 4 3 Charge Mode Verification Use the following steps for charge mode verification including pre charge CC and CV phases for boost operation 1 PS1 and Load 1 should be on from Initial Settings In the EVM GUI it is generally recommended to read READ ALL REGISTERS one time in order to show all the in...

Страница 10: ...r up then turn off Load 2 output Set to CR 12 V 0 5 A 24 Ω Disconnect PS1 from J1 and attach Load 2 to J1 VIN1 and GND 2 Increase Load 1 regulation voltage to 8 0 V and take measurements as follows Measure VBAT PGND TP29 and TP46 8 0 V 0 1 V 3 Prepare the OTG mode charger register settings in the following way In the Chip Configuration page below the Chip Configuration section Uncheck EN Charge to...

Страница 11: ...vias per capacitor terminal if required 5 Place bulk capacitors for VBUS and BAT pins as close as possible to their respective pins Use at least 2 vias per capacitor terminal if required 6 Place the inductor close to SW1 and SW2 pins It is acceptable to use multiple vias to make these connections as the vias are only adding small amounts of inductance and resistance to an inductor 7 While this EVM...

Страница 12: ...ugh Figure 4 4 illustrate the schematic for the BQ25672EVM Figure 4 1 BMS034E2 A Top Layer Board Layout Schematic and Bill of Materials www ti com 12 BQ25672 Evaluation Module SLUUCF3A DECEMBER 2020 REVISED OCTOBER 2021 Submit Document Feedback Copyright 2021 Texas Instruments Incorporated ...

Страница 13: ...E2 A Signal Layer 1 www ti com Board Layout Schematic and Bill of Materials SLUUCF3A DECEMBER 2020 REVISED OCTOBER 2021 Submit Document Feedback BQ25672 Evaluation Module 13 Copyright 2021 Texas Instruments Incorporated ...

Страница 14: ...E2 A Signal Layer 2 Board Layout Schematic and Bill of Materials www ti com 14 BQ25672 Evaluation Module SLUUCF3A DECEMBER 2020 REVISED OCTOBER 2021 Submit Document Feedback Copyright 2021 Texas Instruments Incorporated ...

Страница 15: ...4E2 A Bottom Layer www ti com Board Layout Schematic and Bill of Materials SLUUCF3A DECEMBER 2020 REVISED OCTOBER 2021 Submit Document Feedback BQ25672 Evaluation Module 15 Copyright 2021 Texas Instruments Incorporated ...

Страница 16: ...VAC2 VBUS VBUS VBUS VAC1 VAC2 BTST2 TP14 TP7 TP6 PGND TP13 PGND SYS 10uF C19 10uF C20 10uF C21 10uF C22 DNP 10uF C23 DNP 10uF C24 DNP PGND 33uF C25 DNP TP17 TP18 TP9 TP8 DNP TP1 TP2 40V D5 DNP _acdrv2 40V D1 DNP _acdrv1 VAC2 ACDRV1 10uF C10 DNP 10uF C9 DNP 10uF C11 10uF C12 PGND BAT VBUS 1 D 2 D 3 ID 4 GND 5 6 7 8 11 10 9 J6 1 2 JP10 USB D USB D 1 2 JP6 1 2 JP11 PGND PGND D D TP21 TP22 USB_VIN 1 2...

Страница 17: ... 2A ICHG 2A ICHG 2A ICHG 10 5k R31 27 0k R34 1 2 JP29 1 2 JP28 1 2 JP27 1 2 JP26 3S 3S 4S 4S 1 5MHz 1 5MHz 750kHz 750kHz 1A ICHG 1A ICHG 1A ICHG 1A ICHG AGND 1 2 JP31 1 2 JP33 Green 1 2 D13 1 2 JP32 STAT LED CONNECT STAT 10 0k R39 10 0k R40 10 0k R41 INT SDA SCL 10 0k R42 CE 2 21k R38 PROG PULLUP PULLUP VBUS BAT PULLUP VBUS BAT PULLUP INT SDA SCL CE STAT QON PROG TS REGN ILIM_HIZ REGN SCL SDA PROG...

Страница 18: ...ottky 30 V 0 2 A SOD 323 SOD 323 BAT54HT1G ON Semiconductor D13 1 Green LED Green SMD 1 6x0 8x0 8mm LTST C190GKT Lite On H1 H2 H3 H4 4 Bumpon Hemisphere 0 44 X 0 20 Clear Transparent Bumpon SJ 5303 CLEAR 3M J1 J2 J3 J4 4 Terminal Block 5 08 mm 2x1 Brass TH 2x1 5 08 mm Terminal Block ED120 2DS On Shore Technology J5 1 Terminal Block 5 08 mm 3x1 Brass TH 3x1 5 08 mm Terminal Block ED120 3DS On Shore...

Страница 19: ...100 1 0 1 W 0603 0603 RC0603FR 07100RL Yageo R17 R36 2 0 RES 0 5 0 1 W AEC Q200 Grade 0 0603 0603 CRCW06030000Z0EA Vishay Dale R18 1 5 23k RES 5 23 k 1 0 063 W AEC Q200 Grade 0 0402 0402 CRCW04025K23FKED Vishay Dale R19 1 7 68k RES 7 68 k 1 0 063 W AEC Q200 Grade 0 0402 0402 CRCW04027K68FKED Vishay Dale R20 1 255k RES 255 k 1 0 1 W AEC Q200 Grade 0 0603 0603 CRCW0603255KFKEA Vishay Dale R21 1 127k...

Страница 20: ... Q200 Grade 0 0402 0402 CRCW04022K21FKED Vishay Dale S1 1 Switch Normally open 2 3N force 200k operations SMD KSR KSR221GLFS C K Components SH JP1 SH JP2 SH JP6 SH JP7 SH JP8 SH JP9 SH JP11 SH JP12 SH JP14 SH JP17 SH JP18 SH JP24 SH JP30 SH JP32 14 1x2 Shunt 100mil Gold plated Black Shunt SNT 100 BK G Samtec TP1 TP2 TP4 TP6 TP7 TP9 TP11 TP13 TP14 TP15 TP16 TP17 TP18 TP19 TP20 TP21 TP22 TP30 TP31 T...

Страница 21: ...005X7R1H104K050B E TDK C40 0 10uF CAP CERM 10 uF 25 V 20 X5R 0603 0603 GRT188R61E106ME13 D MuRata C41 0 1000pF CAP CERM 1000 pF 50 V 5 C0G NP0 0402 0402 GRM1555C1H102JA01 D MuRata C42 0 1000pF CAP CERM 1000 pF 50 V 1 C0G NP0 0402 0402 GRM1555C1H102FA01 D MuRata D1 D5 D10 0 40V Diode Schottky 40 V 0 38 A SOD 523 SOD 523 ZLLS350TA Diodes Inc D3 D7 0 30V Diode Schottky 30 V 1 A SOD 123 SOD 123 MBR130...

Страница 22: ...23 SH JP25 SH JP26 SH JP27 SH JP28 SH JP29 SH JP31 SH JP33 0 1x2 Shunt 100mil Gold plated Black Shunt SNT 100 BK G Samtec TP3 TP5 TP8 TP10 TP12 0 Test Point Miniature White TH White Miniature Testpoint 5002 Keystone Board Layout Schematic and Bill of Materials www ti com 22 BQ25672 Evaluation Module SLUUCF3A DECEMBER 2020 REVISED OCTOBER 2021 Submit Document Feedback Copyright 2021 Texas Instrumen...

Страница 23: ...ion Changes from Revision December 2020 to Revision A October 2021 Page Updated Equipment Test Setup for Testing Battery Charging image 7 www ti com Revision History SLUUCF3A DECEMBER 2020 REVISED OCTOBER 2021 Submit Document Feedback BQ25672 Evaluation Module 23 Copyright 2021 Texas Instruments Incorporated ...

Страница 24: ...other than TI b the nonconformity resulted from User s design specifications or instructions for such EVMs or improper system design or c User has not paid on time Testing and other quality control techniques are used to the extent TI deems necessary TI does not test all parameters of each EVM User s claims against TI under this Section 2 are void if User fails to notify TI of any apparent defects...

Страница 25: ... These limits are designed to provide reasonable protection against harmful interference in a residential installation This equipment generates uses and can radiate radio frequency energy and if not installed and used in accordance with the instructions may cause harmful interference to radio communications However there is no guarantee that interference will not occur in a particular installation...

Страница 26: ...y for convenience and should be verified by User 1 Use EVMs in a shielded room or any other test facility as defined in the notification 173 issued by Ministry of Internal Affairs and Communications on March 28 2006 based on Sub section 1 1 of Article 6 of the Ministry s Rule for Enforcement of Radio Law of Japan 2 Use EVMs only after User obtains the license of Test Radio Station as provided in R...

Страница 27: ... any interfaces electronic and or mechanical between the EVM and any human body are designed with suitable isolation and means to safely limit accessible leakage currents to minimize the risk of electrical shock hazard User assumes all responsibility and liability for any improper or unsafe handling or use of the EVM by User or its employees affiliates contractors or designees 4 4 User assumes all...

Страница 28: ...OR DAMAGES ARE CLAIMED THE EXISTENCE OF MORE THAN ONE CLAIM SHALL NOT ENLARGE OR EXTEND THIS LIMIT 9 Return Policy Except as otherwise provided TI does not offer any refunds returns or exchanges Furthermore no return of EVM s will be accepted if the package has been opened and no return of the EVM s will be accepted if they are damaged or otherwise not in a resalable condition If User feels it has...

Страница 29: ...s are subject to change without notice TI grants you permission to use these resources only for development of an application that uses the TI products described in the resource Other reproduction and display of these resources is prohibited No license is granted to any other TI intellectual property right or to any third party intellectual property right TI disclaims responsibility for and you wi...

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