t
V
SW
V
RING
V
R
V
IN
ZCD
V
IN
V
OUT
TVS
D1
D5
Q3
D10
D23
C11
C13
T1
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Design Information
Interaction with Dimmers
In general, input filters and forward phase dimmers do not work well together. The triac needs a minimum
amount of holding current to function. The converter itself is demanding a certain amount of current from
the input to provide to its output. With no filter, the difference of the necessary hold current and the
converter current is provided by the LM3450A dynamic hold circuit. Unfortunately, the actual dimmer
current is not being monitored; instead a filtered version is being measured. In reality, the input filter is
providing or taking current depending upon the dV/dt of the capacitors. The discrepancy between the
measured input current at ISEN and the actual input current through the triac is the worst at the highest
dV/dt of the input filter capacitors. The best way to deal with this problem is to minimize filter capacitance
and increase the regulated hold current until there is enough current to satisfy the dimmer and filter
simultaneously.
Figure 21
shows one effective way to improve the dynamic hold functionality when using an EMI filter. The
hold current path through the passFET is derived between the two filter stages. In this configuration, the
measured input current has only one stage of filtering capacitance to contribute to the descrepancy
between measured and actual input current. In addition, the damping network for the C7 capacitor is
directly connected to the dynamic hold point of the rectified AC (passFET drain). This, combined with the
filter stage between the passFET and the transformer, help attenuate any unwanted switching frequency
coupling into the dynamic hold circuit.
This configuration also provides some extra filtering of the feedforward VAC signal, which is now derived
at the same point as the dynamic hold. One important addition to this EMI filter is a back-to-back TVS
clamp across L2. During transient conditions, if the L2 filter rings too much, the current will try to change
directions. There is no continuous path for current at the passFET drain, therefore the voltage can rise
uncontrolled and damage the passFET. A 20V back-to-back TVS is sufficient to provide this protection.
9.11 Inrush Limiting, Damping and Clamping
Clamp
In any flyback converter there exists large ringing (V
RING
) on the Q3 drain, as shown in
Figure 22
. This is
due to the rising edge of the Q3 drain after turn-off, which excites the resonance created by the leakage
inductance of the transformer and output capacitance of Q3. A clamp circuit is necessary to prevent
damage to Q3 from excessive voltage. The evaluation boards use a transil (TVS) clamp, shown in
Figure 23
Figure 22. Switch Node Ringing
Figure 23. Transil Clamp
When Q3 is on and the drain voltage is low, the blocking diode (D5) is reverse biased and the clamp is
inactive. When the MosFET is turned off, the drain voltage rises past the nominal voltage (reflected
voltage plus the input voltage). If it reaches the TVS clamp v the input voltage, the clamp prevents
any further rise. The TVS diode (D1) voltage is set to prevent the MosFET from exceeding its maximum
rating:
23
SNVA485B – June 2011 – Revised May 2013
AN-2150 LM3450A Evaluation Board
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