Texas Instruments ADS9120, Руководство пользователя, Страница: 8 / 38

OPA378
1µF
+
±
OPA625
±
+
30k Ÿ
1k Ÿ 499
Ÿ
4.7 Ÿ
1k
Ÿ
4.99k Ÿ
2.49 NŸ
10pF
220nF 3×10µF
REF
100nF
100nF
5.0V from
REF5050
Analog Interface
www.ti.com
8 SBAU262 – August 2016
Submit Documentation Feedback
Copyright © 2016, Texas Instruments Incorporated
ADS9120EVM-PDK
2.3 Onboard ADC Reference
The EVM does not include a provision for driving the reference input of the ADS9120 from an external
source. The reference input signal path is entirely self-contained on the ADS9120EVM and consists of the
REF5050, a 5.0-V precision voltage reference. The output of the REF5050 is filtered and buffered by a
reference driver formed from two amplifiers: the OPA625 and OPA378. This reference driver offers zero-
offset, low-noise and is optimized for a 1-LSB voltage regulation under maximum loading conditions at full
device throughput of 2.5-MSPS. The schematic for the reference driver circuit is shown in
Figure 3 .
Figure 3. Onboard Reference Signal Path
3 Digital Interfaces
As noted in Section 1 , the EVM interfaces with the PHI that, in turn, communicates with the computer over
USB. There are two devices on the EVM with which the PHI communicates: the ADS9120 ADC (over SPI
or multiSPI) and the EEPROM (over I
2
C). The EEPROM comes pre-programmed with the information
required to configure and initialize the ADS9120EVM-PDK platform. Once the hardware is initialized, the
EEPROM is no longer used.
3.1 multiSPI
®
for ADC Digital IO
The ADS9120EVM-PDK supports all the interface modes as detailed in the ADS9120 datasheet
(
SBAS710 ). In addition to the standard SPI modes, (with single-, dual- and quad-SDO lanes), the multiSPI
modes support single- and dual-data output rates and the four possible clock source settings as well. The
PHI is capable of operating at a 1.8-V logic level and is directly connected to the digital I/O lines of the
ADC.