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EVM Analog Interface

www.ti.com

Table 2

summarizes the J7 analog interface connector.

Table 2. J7: Analog Interface Connections

Pin

Number

Signal

Description

J7.2

A6+

Positive analog input for channel AIN6

J7.4

A7+

Positive analog input for channel AIN7

J7.6

A0+

Positive analog input for channel AIN0

J7.8

A1+

Positive analog input for channel AIN1

J7.10

AUX+

Positive analog input for AUX channel

J7.12

A2+

Positive analog input for channel AIN2

J7.14

A3+

Positive analog input for channel AIN3

J7.16

A4+

Positive analog input for channel AIN4

J7.18

A5+

Positive analog input for channel AIN5

J7.20

GND

Analog ground connection

J7.1

A6–

Negative analog input for channel AIN6

J7.3

A7–

Negative analog input for channel AIN7

J7.5

A0–

Negative analog input for channel AIN0

J7.7

A1–

Negative analog input for channel AIN1

J7.9

AUX–

Connected to analog ground

J7.11

A2–

Negative analog input for channel AIN2

J7.13

A3–

Negative analog input for channel AIN3

J7.15

A4–

Negative analog input for channel AIN4

J7.17

A5–

Negative analog input for channel AIN5

J7.19

GND

Analog ground connection

2.1

Connecting Negative Inputs to Ground

The negative analog inputs for all channels (except for the AUX channel) are capable of accepting a ±100-
mV signal. The negative analog inputs can either be connected to the analog ground or a ±100-mV signal
can be applied on these inputs.

Table 3

describes the appropriate jumper settings for connecting these

inputs to analog ground.

Table 3. Connecting Negative Analog Inputs to Ground

Position for Connecting to

Signal

Jumper

Analog Ground

Position for Applying a ±100-mV Signal

A0–

J22

Closed

Open

A1–

J16

Closed

Open

A2–

J26

Closed

Open

A3–

J27

Closed

Open

A4–

J28

Closed

Open

A5–

J29

Closed

Open

A6–

J24

Closed

Open

A7–

J23

Closed

Open

AUX–

NA

Always connected to GND

NA

6

ADS8688EVM-PDK Evaluation Module

SBAU230A – August 2014 – Revised December 2014

Submit Documentation Feedback

Copyright © 2014, Texas Instruments Incorporated

Содержание ADS8688EVM-PDK

Страница 1: ...e programming the device internal registers and is independent for each channel The device offers a 1 MΩ constant resistive input impedance irrespective of the selected input range This user s guide covers circuit description schematic diagram and bill of materials for the ADS8688EVM circuit board Table 1 lists the related documents that are available through the Texas Instruments web site at www ...

Страница 2: ...els AIN4 AIN5 AIN6 and AIN7 5 3 Power Supply Connections Diagram 10 4 ADS8688EVM Default Jumper Settings 11 5 Bottom View of the Simple Capture card with the microSD Memory Card Installed 13 6 Bottom View of the ADS8688EVM Board with the microSD Memory Card Installed 13 7 Connecting the ADS8688EVM Board to the Simple Capture Card 14 8 LED Indicators on the Simple Capture Card 14 9 Destination Dire...

Страница 3: ...d 6 4 Using Onboard Second Order Butterworth Low Pass Filters 7 5 Bypassing the Onboard Second Order Butterworth Low Pass Filters 7 6 Selecting the Reference for the ADS8688EVM 7 7 External Reference Connections 7 8 Connector J19 Pin Out 8 9 Jumper Settings for Generating HVDD and HVSS Using an Onboard Switching Regulator 9 10 Jumper Settings for Generating HVDD and HVSS from External High Voltage...

Страница 4: ...pply Integrated 4 096 V voltage reference Bipolar 10 24 V 5 12 V 2 56 V or unipolar 0 V to 10 24 V 0 V to 5 12 V input ranges for each channel Onboard second order Butterworth low pass filters for four channels Onboard regulator for generating a 15 V bipolar supply for second order Butterworth low pass filters Capable of accepting a 100 mV signal on the negative analog inputs AIN_xGND ADS8688EVM G...

Страница 5: ...nnector provides a convenient 10 pin dual row header at J7 Figure 1 and Figure 2 show the ADS8688EVM analog input connections for channels AIN0 to AIN3 and channels AIN4 to AIN7 respectively Table 2 lists the analog interface connections for J7 Figure 1 ADS8688EVM Analog Input Connections for Channels AIN0 AIN1 AIN2 and AIN3 Figure 2 ADS8688EVM Analog Input Connections for Channels AIN4 AIN5 AIN6 ...

Страница 6: ...nalog input for channel AIN2 J7 13 A3 Negative analog input for channel AIN3 J7 15 A4 Negative analog input for channel AIN4 J7 17 A5 Negative analog input for channel AIN5 J7 19 GND Analog ground connection 2 1 Connecting Negative Inputs to Ground The negative analog inputs for all channels except for the AUX channel are capable of accepting a 100 mV signal The negative analog inputs can either b...

Страница 7: ... pins 2 and 3 Table 5 Bypassing the Onboard Second Order Butterworth Low Pass Filters Channel Jumper Position Jumper Position AIN0 J25 Open J8 Closed between pins 2 and 3 AIN1 J31 Open J10 Closed between pins 2 and 3 AIN2 J30 Open J11 Closed between pins 1 and 2 AIN3 J15 Open J9 Closed between pins 1 and 2 2 3 Selecting the Reference Mode for the ADS8688EVM The ADS8688EVM can either operate on an ...

Страница 8: ... Chip select input for the ADC J19 38 SDI Data input for the ADC J19 39 SDO Data output from the ADC J19 45 49 EVMSDxxxxx Digital connections for the onboard SD card J19 2 J19 10 J19 16 J19 50 GND Ground connections 3 1 Serial Interface SPI The ADS8688 device uses SPI serial communication in mode 1 CPOL 0 CPHA 1 with clock speeds up to 17 MHz The ADS8868xEVM offers 49 9 Ω resistors between the SPI...

Страница 9: ...ng Regulator Jumper Position for Using an Onboard Switching Regulator J12 Closed between pins 1 and 2 J14 Closed between pins 1 and 2 J17 Open HVDD and HVSS for buffers U4 and U5 can also be generated by providing external high voltage supplies on J18 as shown in Table 10 Table 11 and Figure 3 illustrate the power supply connections for external supplies Table 10 Jumper Settings for Generating HVD...

Страница 10: ...he ADS8688 is generated by converting an unregulated 5 V supply from the Simple Capture card or by converting an external 5 V supply to a regulated 5 V supply by using the REG71055 charge pump and the TPS7A4901 linear regulator The DVDD digital supply for the ADC is derived from a 3 3 V supply from the Simple Capture card 10 ADS8688EVM PDK Evaluation Module SBAU230A August 2014 Revised December 20...

Страница 11: ...t before operation 5 1 Default Jumper Settings Figure 4 details the default jumper settings Table 12 provides the configuration for these jumpers Figure 4 ADS8688EVM Default Jumper Settings 11 SBAU230A August 2014 Revised December 2014 ADS8688EVM PDK Evaluation Module Submit Documentation Feedback Copyright 2014 Texas Instruments Incorporated ...

Страница 12: ...re the microSD memory card included in the kit is installed in the microSD socket P6 on the back of the Simple Capture card before connecting the EVM to the computer Otherwise as a result of improper boot up Windows cannot recognize the ADS8688EVM PDK as a connected device Complete the following steps to install the software 1 Verify the microSD memory cards are installed on the Simple Capture car...

Страница 13: ...microSD socket on the back of the Simple Capture card and on the back of ADS8688EVM board Figure 5 and Figure 6 show the bottom view of the Simple Capture card and ADS8688EVM respectively with the microSD card installed Figure 5 Bottom View of the Simple Capture card with the microSD Memory Card Installed Figure 6 Bottom View of the ADS8688EVM Board with the microSD Memory Card Installed 13 SBAU23...

Страница 14: ...apture card see Figure 5 2 Verify the microSD card is installed on the back of the ADS8688EVM see Figure 6 3 Verify the ADS8688EVM jumpers are configured as illustrated in Figure 4 4 Connect the ADS8688EVM board to the Simple Capture card as Figure 7 illustrates Figure 7 Connecting the ADS8688EVM Board to the Simple Capture Card 5 Connect the Simple Capture card to the computer through the micro U...

Страница 15: ...licking the setup exe file This action installs the EVM GUI software and the required and Simple Capture card device driver components 4 After the installer begins a welcome screen displays Click Next to continue 5 A prompt appears with the destination directory select the default directory under Program Files x86 Texas Instruments ADS8684_8 EVM GUI as shown in Figure 9 and Figure 10 Figure 9 Dest...

Страница 16: ...d Device Driver Installation During installation of the Simple Capture card device driver a prompt may appear with the Windows security message shown in Figure 13 Select Install this driver software anyway to install the driver required for proper operation of the software The drivers contained within the installers are safe for installation to your system Figure 13 Windows 7 Driver Installation W...

Страница 17: ...ation is complete prompts appear to install the Simple Capture card device driver as shown in Figure 14 and Figure 15 2 A computer restart may be required to finish the software installation If prompted restart the computer to complete the installation Figure 14 Installation Wizard Screen Figure 15 Simple Capture Card Device Driver Completion 17 SBAU230A August 2014 Revised December 2014 ADS8688EV...

Страница 18: ...d settings cannot be changed When you change a setting on the ADS8688EVM GUI the setting immediately updates on the board Settings on the ADS8688EVM correspond to settings described in the ADS8688 product data sheet available for download at www ti com see the product data sheet for details To load the ADS8688EVM GUI follow these steps Step 1 Make sure the PDK kit is configured and powered up as e...

Страница 19: ...side of the GUI window A channel can be powered down by checking the AINx_PD box if a channel is powered down that channel turns grey in system block view The voltage range for each channel can be selected from a drop down menu corresponding to each channel in the system block diagram view see Figure 17 Figure 18 displays the window for selecting the input voltage ranges 19 SBAU230A August 2014 Re...

Страница 20: ...igure 17 System Block Diagram View Figure 18 Selecting the Input Range for the Channels 20 ADS8688EVM PDK Evaluation Module SBAU230A August 2014 Revised December 2014 Submit Documentation Feedback Copyright 2014 Texas Instruments Incorporated ...

Страница 21: ...ite the register For reading a register the user must select the register in the register map and click the Read Register button All registers can be read by clicking the Read All button The values for all registers can be saved in a configuration file cfg by the Save Config button The saved configuration can be loaded back by using the Load Config button Changes made in the register map view are ...

Страница 22: ...gure 20 shows the ADS8688EVM GUI window for the jumper settings Figure 20 ADS8688EVM Jumper Settings 6 4 Capturing the Data Data can be captured from ADS8688EVM either in manual mode or in auto mode Manual mode captures data from one of the device channels whereas auto mode captures data from the channels that are powered up and selected in the auto channel sequence The Section 6 4 1 and Section 6...

Страница 23: ...pports a sampling rate from 20 kSPS to 500 kSPS The sampling rate is adjusted to the closest value obtained from Equation 1 Sampling Rate kSPS 17000 34 K where 0 K 816 and K is an integer 1 The GUI supports a capture of 1024 samples to 8388608 samples For sampling rates less than 100 kSPS the maximum number of samples are limited to 131072 per capture The number of samples are adjusted to the clos...

Страница 24: ...red per channel must be entered in the ADC Capture Settings box The number of samples per channel value is adjusted to the closest power of 2 by the GUI The GUI supports a maximum capture of 8388608 samples per capture The maximum number of samples per channel that can be captured in auto mode is determined by Equation 2 Number of Samples per Channel x Number of Channels Enabled 8388608 2 Data cap...

Страница 25: ... Kit Operation Figure 23 Data Capture in Auto Mode with Multi Graph View 25 SBAU230A August 2014 Revised December 2014 ADS8688EVM PDK Evaluation Module Submit Documentation Feedback Copyright 2014 Texas Instruments Incorporated ...

Страница 26: ... for saving the captured data Figure 24 Saving the Captured Data 6 5 Analyzing the Data The ADS8688EVM GUI includes the histogram analysis and FFT analysis for data captured from the ADS8688EVM in auto or manual mode Data can be analyzed with the Selected Analysis from the drop down menu in the ADC capture settings 26 ADS8688EVM PDK Evaluation Module SBAU230A August 2014 Revised December 2014 Subm...

Страница 27: ...number of hits Sigma Is the standard deviation of all the codes captured Mean Is the average of all the codes captured for a certain input 6 5 2 FFT Analysis The FFT Analysis page in the GUI performs the fast fourier transform FFT of the captured data and displays the resulting frequency domain plots This page also calculates key ADC dynamic performance parameters such as signal to noise ratio SNR...

Страница 28: ...nnels are sampled in auto mode a deterministic phase difference between signals is introduced resulting from the time difference between sampling instants The phase difference is dependent on sampling rate input signal frequency number of channels and initial phase difference The phase compensation analysis page compensates for the introduced phase difference and provides the results after phase c...

Страница 29: ...688EVM PDK Kit Operation Figure 27 Phase Compensation Analysis 29 SBAU230A August 2014 Revised December 2014 ADS8688EVM PDK Evaluation Module Submit Documentation Feedback Copyright 2014 Texas Instruments Incorporated ...

Страница 30: ...GUI window In simulation mode the GUI does not connect to the ADS8688EVM board and only displays the results for one set of captured data stored in the computer Figure 28 shows the ADS8688EVM GUI running in simulation mode Figure 28 Simulation Mode 30 ADS8688EVM PDK Evaluation Module SBAU230A August 2014 Revised December 2014 Submit Documentation Feedback Copyright 2014 Texas Instruments Incorpora...

Страница 31: ...ERM 22uF 25V 10 X7R 1210 MuRata GRM32ER71E226KE15L 9 3 C34 C36 C53 CAP CERM 10uF 25V 10 X7R 1206 MuRata GRM31CR71E106KA12L 10 2 C37 C54 CAP CERM 10uF 35V 10 X7R 1206 Taiyo Yuden GMK316AB7106KL C4 C12 C15 C18 C21 C38 C41 C56 11 15 CAP 10000pF 0603 5 50V C0G TDK C1608C0G1H103J080AA C58 12 1 C42 CAP CERM 0 22uF 16V 10 X7R 0603 TDK C1608X7R1C224K 13 2 C44 C46 CAP CERM 2 2uF 10V 10 X7R 0603 MuRata GRM1...

Страница 32: ...CW0603100RFKEA R2 R3 R5 R10 R14 R16 R86 R91 42 17 RES 49 9 ohm 1 0 063W 0402 Vishay Dale CRCW040249R9FKED R93 43 16 R23 R32 R34 R35 R37 R38 R40 R41 RES 357 ohm 1 0 063W 0402 Vishay Dale CRCW0402357RFKED R36 R44 R48 R52 R94 R96 R98 44 13 Resistor Uninstalled NI NI R100 R102 R103 R107 R4 R33 R39 R47 R49 R61 R69 R77 45 16 RES 0 ohm 5 0 063W 0402 Yageo America RC0402JR 070RL R78 R92 R97 R101 R104 R106...

Страница 33: ...h PSRR LDO 66 1 U10 Texas Instruments TPS7A3001DGN Negative Linear Regulator 67 1 U11 IC 2K Serial EEPROM Atmel AT24C02B 68 1 U2 16 bit 500KSPS 8 Channel SAR ADC Texas Instruments ADS8688IDBT 69 2 U4 U5 OpAmp Low Noise Low Power 36V Texas Instruments OPA2209AIDGKR IC VIN 3V to 35V 150mA Ultralow Noise High PSRR LDO 70 2 U6 U7 Texas Instruments TPS7A4901DGN Regulator IC SWITCHED CAP BUCK BOOST CONV...

Страница 34: ...youts are not to scale These figures are intended to show how the board is laid out these figures are not intended to be used for manufacturing ADS8688EVM PCBs Figure 29 ADS8688EVM PCB Top Layer L1 34 ADS8688EVM PDK Evaluation Module SBAU230A August 2014 Revised December 2014 Submit Documentation Feedback Copyright 2014 Texas Instruments Incorporated ...

Страница 35: ...erials Schematics and Layout Figure 30 ADS8688EVM PCB Ground Layer L2 35 SBAU230A August 2014 Revised December 2014 ADS8688EVM PDK Evaluation Module Submit Documentation Feedback Copyright 2014 Texas Instruments Incorporated ...

Страница 36: ...ics and Layout www ti com Figure 31 ADS8688EVM PCB Analog Power Layer L3 36 ADS8688EVM PDK Evaluation Module SBAU230A August 2014 Revised December 2014 Submit Documentation Feedback Copyright 2014 Texas Instruments Incorporated ...

Страница 37: ...ls Schematics and Layout Figure 32 ADS8688EVM PCB Digital Power Layer L4 37 SBAU230A August 2014 Revised December 2014 ADS8688EVM PDK Evaluation Module Submit Documentation Feedback Copyright 2014 Texas Instruments Incorporated ...

Страница 38: ...matics and Layout www ti com Figure 33 ADS8688EVM PCB Ground Layer L5 38 ADS8688EVM PDK Evaluation Module SBAU230A August 2014 Revised December 2014 Submit Documentation Feedback Copyright 2014 Texas Instruments Incorporated ...

Страница 39: ...erials Schematics and Layout Figure 34 ADS8688EVM PCB Bottom Layer L6 39 SBAU230A August 2014 Revised December 2014 ADS8688EVM PDK Evaluation Module Submit Documentation Feedback Copyright 2014 Texas Instruments Incorporated ...

Страница 40: ...03 COJ10 PIJ1101 PIJ1102 PIJ1103 COJ11 PIJ1501 PIJ1502 COJ15 PIJ1601 PIJ1602 COJ16 PIJ2101 PIJ2102 COJ21 PIJ2201 PIJ2202 COJ22 PIJ2301 PIJ2302 COJ23 PIJ2401 PIJ2402 COJ24 PIJ2501 PIJ2502 COJ25 PIJ2601 PIJ2602 COJ26 PIJ2701 PIJ2702 COJ27 PIJ2801 PIJ2802 COJ28 PIJ2901 PIJ2902 COJ29 PIJ3001 PIJ3002 COJ30 PIJ3101 PIJ3102 COJ31 PINT101 PINT102 CONT1 PIR101 PIR102 COR1 PIR201 PIR202 COR2 PIR301 PIR302 C...

Страница 41: ... PIR6101 PIR6102 COR61 PIR6201 PIR6202 COR62 PIR6301 PIR6302 COR63 PIR6401 PIR6402 COR64 PIR6501 PIR6502 COR65 PIR6601 PIR6602 COR66 PIR6701 PIR6702 COR67 PIR6801 PIR6802 COR68 PIR6901 PIR6902 COR69 PIR7001 PIR7002 COR70 PIR7101 PIR7102 COR71 PIR7201 PIR7202 COR72 PIR7301 PIR7302 COR73 PIR7501 PIR7502 COR75 PIR7701 PIR7702 COR77 PIR7801 PIR7802 COR78 PIR7901 PIR7902 COR79 PIR8001 PIR8002 COR80 PIR...

Страница 42: ...stances of SDCC Controller board to Simple Capture card throughout this document 1 NOTE Page numbers for previous revisions may differ from page numbers in the current version 40 Revision History SBAU230A August 2014 Revised December 2014 Submit Documentation Feedback Copyright 2014 Texas Instruments Incorporated ...

Страница 43: ...ring the warranty period to the address designated by TI and that are determined by TI not to conform to such warranty If TI elects to repair or replace such EVM TI shall have a reasonable time to repair such EVM or provide replacements Repaired EVMs shall be warranted for the remainder of the original warranty period Replaced EVMs shall be warranted for a new full ninety 90 day warranty period 3 ...

Страница 44: ...io transmitter has been approved by Industry Canada to operate with the antenna types listed in the user guide with the maximum permissible gain and required antenna impedance for each antenna type indicated Antenna types not included in this list having a gain greater than the maximum gain indicated for that type are strictly prohibited for use with this device Concernant les EVMs avec antennes d...

Страница 45: ... any load to the EVM output If there is uncertainty as to the load specification please contact a TI field representative During normal operation even with the inputs and outputs kept within the specified allowable ranges some circuit components may have elevated case temperatures These components include but are not limited to linear regulators switching transistors pass transistors current sense...

Страница 46: ...F REMOVAL OR REINSTALLATION ANCILLARY COSTS TO THE PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES RETESTING OUTSIDE COMPUTER TIME LABOR COSTS LOSS OF GOODWILL LOSS OF PROFITS LOSS OF SAVINGS LOSS OF USE LOSS OF DATA OR BUSINESS INTERRUPTION NO CLAIM SUIT OR ACTION SHALL BE BROUGHT AGAINST TI MORE THAN ONE YEAR AFTER THE RELATED CAUSE OF ACTION HAS OCCURRED 8 2 Specific Limitations IN NO EVENT SHALL T...

Страница 47: ...esponsible for compliance with all legal regulatory and safety related requirements concerning its products and any use of TI components in its applications notwithstanding any applications related information or support that may be provided by TI Buyer represents and agrees that it has all the necessary expertise to create and implement safeguards which anticipate dangerous consequences of failur...

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