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Signal Conditioning
2-2
2.1
Signal Conditioning
The factory recommends the analog input to any SAR type converter be
buffered and low-pass filtered. It is important to note that the input buffer circuit
of the ADS8383EVM, shown in Figure 2−1, utilizes the THS4031 configured
as an inverting gain of one. The amplifier is not stable in a conventional a
gain-of-one configuration. The THS4031 was selected for it’s low noise, high
slew rate and fast settling time. The low pass filter resistor and capacitor values
were selected such that ADS8383EVM would meet the 100 kHz AC
performance specifications listed in the data sheet. The series resistor works
in conjunction with the capacitor to filter the input signal, but also isolates the
amplifier from the 6800 pF capacitive load. The capacitor to ground at the input
of the A/D works in conjunction with the series resistor to filter the input signal,
and acts like a charge reservoir. This external filter capacitor works with the
amplifier to charge the internal sampling capacitor during sampling mode.
The EVM has a provision to offset the input voltage by adjusting R23, a 10-k
Ω
potentiometer.
Figure 2−1. Input Buffer Circuit
1 k
Ω
1 k
Ω
−V
CC
V
I
0.1
µ
F
1
µ
F
10
Ω
(+) IN
(−) IN
6800 pF
1
µ
F
0.1
µ
F
0.22
µ
F
500
Ω
4.096 V
10 k
Ω
+V
CC
THS4031
−
+
Содержание ADS8383EVM
Страница 1: ...ADS8383EVM December 2003 Data Acquistion User s Guide SLAU119...
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Страница 26: ...ADS8383EVM Layout 6 6 Figure 6 3 Power Plane Layer 3 Figure 6 4 Bottom Layer Layer 4...