Texas Instruments ADS8381EVM, Руководство пользователя, Страница: 17 / 30

4-1 Power Supply Requirements
Power Supply Requirements
The EVM accepts four power supplies.
-
A dual
±
Vs DC supply for the dual supply op amps. Recommend a
±
6-VDC
supply.
-
A 5.0-VDC supply for analog section of the board (A/D + Refer-
ence).
-
A 5.0-V or +3.3-VDC supply for digital section of the board (A/D
+ address d buffers).
There are two ways to provide these voltages.
1) Wire in the voltages at test points on the EVM. See Table 4−1.
Table 4−1. Power Supply Test Points
Test Point Signal Description
TP16 +BVDD Apply +3.3 V or +5.0 V. See ADC data sheet for full range.
TP20 +AVCC Apply +5.0 V.
TP14 +VA Apply +6.0 V. Positive supply for amplifier.
TP18 −VA Apply –6.0 V. Negative supply for amplifier.
2) Use the power connector J1, and derive the voltages elsewhere. The
pinout for this connector is shown below. If using this connector, set the
W4 jumper to c3.3 V or +5 V from connector to +BVDD. Short
between pins 1−2 to 5 VD, or short between pins 2−3 to select
+3.3 VD as the source for the digital buffer voltage supply (+BVDD).
Table 4−2. Power Connector, J1, Pinout
Signal Power Connector − J1 Signal
+VA (+6 V) 1 2 –VA (–6 V)
+5 VA 3 4 N/C
DGND 5 6 AGND
N/C 7 8 N/C
+3.3 VD 9 10 +5 VD
Chapter 4