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ADSxx54EVM-PDK Initial Setup
5
ADSxx54EVM-PDK Initial Setup
This section presents the steps required to set up the ADSxx54EVM-PDK kit before operation.
5.1
Default Jumper Settings
A silkscreen plot detailing the default jumper settings is shown in
explains the
configuration for these jumpers.
Figure 4. ADSxx54EVM Default Jumper Settings
Table 6. Default Jumper Configuration
Pin
Default Position
Switch Description
Number
JP1
Open
JP1.2 header connector to A0(-)
JP2
Open
JP2.2 header connector to A0(+)
JP3
Open
JP3.2 header connector to A1(-)
JP4
Open
JP4.2 header connector to A1(+)
JP5
Closed
Closed when configured in ±V
ref
range; open to support ±2 × V
ref
range
JP6
Closed
Closed when configured in ±V
ref
range; Open to support ±2 × V
ref
range
Closed to connect onboard 2.5-V reference to REFIO_A; open when using
JP7
Closed
ADSxx54 internal reference
Closed to connect onboard 2.5-V reference to REFIO_B; open when using
JP8
Closed
ADSxx54 internal reference.
JP9
Open
Open: onboard AVDD set to +5 V; closed: onboard AVDD set to +5.2 V
Short 2-3 selects onboard regulated AVDD supply; short 1-2 selects external
JP10
Short 2-3
AVDD through J1
9
SBAU209 – April 2014
ADS8354EVM-PDK and ADS7854EVM-PDK
Copyright © 2014, Texas Instruments Incorporated