Texas Instruments ADS7809, Руководство пользователя, Страница: 7 / 10

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ti
12500 TI Blvd. Dallas, Texas 75243
Title:
SHEET: OF: FILE:
SIZE: DATE: REV: 30-Oct-2004
Revision History
REV ECN Number Approved
Drawn By:
Engineer:
1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
J1
1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
J2B
1 2
3 4
5 6
7 8
9 10
J3
+5VA
EXT_REFIN
TP3 TP2
TP1
L2
15uF
5Vd
AGND DGND
Tom Hendrick
Tom Hendrick B
ADS7809/8509 Evaluation Module
Schematic
A
1 1 EDGE #6465121
1 Prototype
TH
+
C7
L1
15uH
+
C5
5Va
R1IN
1
R2IN
3
R3IN
4
REF
6
CAP
5
SB/BTC
8
EXT/INT
9
AGND1
2
AGND2
7
DGND
10
/BUSY
17
Vana
19
PWRD
18
/CS
16
DATACLK
12
SYNC
11
DATA
13
R/C
15
TAG
14
VDIG
20
U1
REFOUT
W8
W10
R12
10K
5Vd
W11
R13
10K
5Vd
W14
R14
10K
5Vd
+5VD
C12
0.1uF
C2
2.2uF
C13
0.01uF
5Va
C8
0.01uF C6
0.1uF
5Vd
C9
2.2uF
R4
100 ohm
R7
200 ohm
W4
R5
33.2K
R3
33.2K
R8
50K
C4
10uF
5Va
R2
576K
ADJ_REFIN
R6
50K
C3
10uF
5Va
W5
W1
W2
W3
1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
W12
W7
EVM_IN_0
EVM_IN_1
EVM_IN_2
EVM_IN_3
EVM_IN_4
EVM_IN_5
EVM_IN_6
EVM_IN_7
EVM_IN_0
EVM_IN_1
EVM_IN_2
EVM_IN_3
EVM_IN_4
EVM_IN_5
EVM_IN_6
EVM_IN_7
ADC_ANALOG_IN
C1
2.2nF
R1
100 ohm
+VA
-VA
+VA -VA
R11
C10
10nF
C11
10nF
R9
0 Ohm
1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
J2T
/CS
/CS
/CS
SCLK
SCLK
SCLK
CLKR
FSX
FSX
FSX
FSR FSR
DATA
/INT
/INT
TOUT
TOUT
GPIO
GPIO
TAG
TAG
W13
CLKR
R15
33
W9
SIMO
SIMO
DR
DR
TP4
TP6
Operating Modes:
Internal Clock (SPI
Master
) - W10
Closed
, W8 1-2, W9 1-2
External Clock (No TAG) - W10 Open , W8 1-2, W9 2-3
External Clock (W/ TAG) - W10 Open , W8 2-3 (1-2 Last Board), W9 2-3
RANGE
W/O TRIM W/TRIM
0-10V
0-5V
0-4V
+/-10V
+/-5V
+/-3V
W1 W2 W3 W4 W5 W1 W2 W3 W4 W5
5-6 1-2 5-6 1-2 2-3 5-6 1-2 5-6 1-2 1-2
5-6 5-6 1-2 1-2 2-3 5-6 5-6 1-2 1-2 1-2
1-2 5-6 1-2 2-3 2-3 1-2 5-6 1-2 2-3 1-2
1-2 5-6 3-4 2-3 1-2
1-2 5-6 3-4 2-3 2-3
5-6 1-2 3-4 1-2 2-3
5-6 1-2 3-4 1-2 1-2
1-2 1-2 3-4 2-3 1-2
1-2 1-2 3-4 2-3 2-3
FOR OFFSET ADJUST, MOVE W6 to position 5-6
3
2
6
7
4
U2
R16
R17
R10
+VA
TP5
W6
A Initial Release
TH