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2.2.4

ADC Clock Input

2.2.5

ADC Digital Outputs

2.2.6

Surface-Mount Jumper Selections

2.3

Deserialization and the TSW1200

Circuit Description

Users should connect a filtered, low-phase-noise clock input to J12. A transformer, T5, provides the
conversion from a single-ended clock signal into a differential clock signal. When selecting the clock signal
level, users should account for the transformer having an impedance ratio of 4, with a voltage step-up
of 2.

The ADS64XX ADC outputs serialized data, a bit clock (DCLK), and a frame clock (FCLK). These signals
are brought to a high-density Samtec™ connector, J15. Users have three options in processing the ADC
data.

1. Customers can use the mating logic analyzer breakout board and capture the ADC data using a logic

analyzer. Users would be required to perform a software deserialization of the digital data before
conducting analysis. Contact the factory for a breakout board for your logic analyzer.

2. Customers can create their own digital interface card which directly interfaces to the ADC. In this case,

customers would design their mating digital interface board with the Samtec part number
QSH-060-01-F-D-A, which is the companion part number to the EVM connector.

3. In most cases, customers can use a hardware deserialization solution such as the TSW1200. The

TSW1200 features a powerful Xilinx™ Virtex 4 that comes preloaded with both 12-bit and 14-bit
deserialization routines. In addition, customers can use the FPGA to develop their own deserializer and
digital prototypes. The digital output of the TSW1200 easily plugs into logic analyzers or TI's own
digital capture and analysis solution, the TSW1100.

The EVM features surface-mount jumpers in cases where either the signal integrity is important or the
functions are not often used.

Table 2

summarizes these options.

Table 2. Surface Mount Jumpers

ADC

Reference Designator

Default Selection

Optional Selection

Signal

RESET

J7

2–3, parallel mode operation

1–2, serial mode
operation

SCLK

J6

Not populated, pin tied low

1–2, TSW1200 control
over SCLK

SDATA

J8

Not populated, pin tied low

1–2, TSW1200 control
over SDATA

SEN

J5

2–3: EVM J16 controls parallel operation modes

1–2, TSW1200 control
over SEN

PD

J9

Not populated, pin tied low, device operational

1–2, TSW1200 control
over PD

INC_M

JP1

2–3, Transformer-coupled analog input to channel C

1–2, Amplifier-coupled
path to channel C

INC_P

JP2

2–3, Transformer-coupled analog input to channel C

1–2, Amplifier-coupled
path to channel C

While the specifics of the deserializer are out of the scope of this user's guide, TI has partnered up with
Xilinx to deliver an open-source deserializer solution with application note documentation. When designing
the deserializer, users should consult Xilinx application note XAPP866, hosted on the Xilinx website. In
addition, TI has provided a guide to understanding the different digital output modes of the ADC and how
to pick the most appropriate digital output mode for deserialization. Users should consult

Demystifying the

Digital Output Choices of the ADS6XXX

, TI application note

SLAA348

.

SLAU196 – April 2007

9

Submit Documentation Feedback

Содержание ADS64XX EVM

Страница 1: ...ADS64XX EVM User s Guide User s Guide April 2007 SLAU196 ...

Страница 2: ...2 SLAU196 April 2007 Submit Documentation Feedback ...

Страница 3: ...cuit Function 7 2 3 Deserialization and the TSW1200 9 3 ADC Evaluation 10 3 1 Hardware Selection 10 3 2 Coherent Input Frequency Selection 11 4 Physical Description 13 4 1 PCB Layout 13 4 2 Bill of Materials 19 4 3 PCB Schematics 21 Important Notices 26 SLAU196 April 2007 Table of Contents 3 Submit Documentation Feedback ...

Страница 4: ...Power Plane 16 8 Layer 5 Bottom Side 17 9 Layer 6 Bottom Silkscreen 18 10 Sheet 1 of 5 21 11 Sheet 2 of 5 22 12 Sheet 3 of 5 23 13 Sheet 4 of 5 24 14 Sheet 5 of 5 25 List of Tables 1 Three Pin Jumper List 5 2 Surface Mount Jumpers 9 3 ADS64XXEVM Bill of Materials 19 4 List of Figures SLAU196 April 2007 Submit Documentation Feedback ...

Страница 5: ...ferences J17 1 Sets ADC output mode to either 1 wire 2 wire SDR or DDR DDR 2 wire DDR 2 wire Use silkscreen for configuration J18 Sets ADC output serialization to either 14X or 16X and sets 16X rising edge 14X rising edge 2 data formatting to rising edge or falling edge when the ADC is used in SDR mode Use silkscreen for configuration J19 1 This is an ADC reserved pin and should always be set to D...

Страница 6: ...dance generate a 10 MHz 0 V offset 1 dBFS amplitude sine wave signal into either J10 input channel A or J11 input channel B This provides a transformer coupled differential input signal to the ADC TI uses an Agilent 8644B with an LC filter as a signal source 10 TSW1200 The deserialized parallel output data can be probed using a logic analyzer on J5 for inputs to ADC channel A and on J4 for inputs ...

Страница 7: ... this ADC with a variety of transformer brands transorfmer configurations and terminations For many applications a single low cost transformer can be used in the input signal chain to a very high degree of performance Customers should select a transformer configuration based on their ADC input bandwidth frequency To assist in this process TI has swept the analog input frequency and plotted the res...

Страница 8: ...DC inputs can then be biased by the R14 and R15 combination Another ac coupled approach not supported on this EVM would be to use a transformer at the outputs of the THS4509 In this case the transformer would provide for ac coupling and one could bias the inputs of the ADC by feeding the ADC VCM to the transformer center tap on the secondary It should be noted that the THS4509 used on this EVM is ...

Страница 9: ...he FPGA to develop their own deserializer and digital prototypes The digital output of the TSW1200 easily plugs into logic analyzers or TI s own digital capture and analysis solution the TSW1100 The EVM features surface mount jumpers in cases where either the signal integrity is important or the functions are not often used Table 2 summarizes these options Table 2 Surface Mount Jumpers ADC Referen...

Страница 10: ...rtion performance if the noise performance is worse than that of the ADC under evaluation the ADC digitizes the performance of the source Noise can be broken into two components broadband noise and close in phase noise Broadband noise can be improved by the LC filter added to improve distortion performance however the close in phase noise typically cannot be improved by additional filtering Theref...

Страница 11: ...ut signal into the ADC is carefully chosen such that when a continuous time signal is reconstructed from a finite sample set no time domain discontinuities exist To achieve this the input frequency must be an integer multiple of the ratio of the ADC s sample rate fs and the number of samples collected from the logic analyzer Ns The ratio of fs to Ns is typically referred to as the fundamental freq...

Страница 12: ...www ti com ADC Evaluation Figure 3 ADS64XX EVM Setup 12 SLAU196 April 2007 Submit Documentation Feedback ...

Страница 13: ...onnection between ground planes By default the ground planes are not connected together and should be connected at the power supply Although this board uses separate ground planes between analog and digital supplies it should be noted that TI has conducted experiments with both single and split ground planes and found the performance to be identical The ADC features a constant current LVDS output ...

Страница 14: ...www ti com K002 Physical Description Figure 5 Layer 2 Top Side 14 SLAU196 April 2007 Submit Documentation Feedback ...

Страница 15: ...www ti com K003 Physical Description Figure 6 Layer 3 Gound Plane SLAU196 April 2007 15 Submit Documentation Feedback ...

Страница 16: ...www ti com K004 Physical Description Figure 7 Layer 4 Power Plane 16 SLAU196 April 2007 Submit Documentation Feedback ...

Страница 17: ...www ti com K005 Physical Description Figure 8 Layer 5 Bottom Side SLAU196 April 2007 17 Submit Documentation Feedback ...

Страница 18: ...www ti com K006 Physical Description Figure 9 Layer 6 Bottom Silkscreen 18 SLAU196 April 2007 Submit Documentation Feedback ...

Страница 19: ...201 Johnson Components Short pins 2 and 3 J5 J7 2 SMD3P_BRIDGE using 0 Ω J6 J8 J9 3 SMD3P_BRIDGE No part Leave as is J15 1 CONN_QTH_30X2 D A QTH 60 02 F D A J16 J17 J18 J19 J20 5 Header 4x2 90131 0124 Molex Short pins 2 and 3 JP1 JP2 2 Jumper_1x3_SMT No part using 0 Ω JP6 1 Jumper_1x3 929400 01 36 3M L1 L2 2 Bead 220 Ω EXC 3BB221H Panasonic L8 L9 2 68 EXC ML32A680U Panasonic Screw machine PH 4 40 ...

Страница 20: ...EKF1002V Panasonic R83 R45 R46 R51 R52 R58 9 10 Ω ERJ 3EKF10R0V Panasonic R60 R65 R66 R71 R47 R50 R53 R57 R61 8 200 Ω ERJ 3EKF2000V Panasonic R64 R67 R70 SW1 1 Switch pushbutton KT11P3JM C K Switch T1 T2 T3 T4 T5 T6 T7 9 WBC1 1TLB WBC1 1TLB Coilcraft T8 T9 TP1 TP2 TP3 TP4 TP9 6 Test point black 5001 Keystone TP12 TP5 TP6 TP7 TP8 TP10 6 Test point white 5002 Keystone TP11 U1 1 ADS64XX U2 1 THS4509 ...

Страница 21: ...C7 1uF C7 1uF 1 2 P3 Banana jack red P3 Banana jack red 1 1 C5 22uF C5 22uF 1 2 C6 1uF C6 1uF 1 2 C52 33UF 16V C52 33UF 16V 1 2 P4 Banana jack black P4 Banana jack black 1 1 D1 GREEN D1 GREEN 1 2 J21 Banana jack red 5V_AMP J21 Banana jack red 5V_AMP L1 Bead 220 ohm L1 Bead 220 ohm 1 2 C4 1uF C4 1uF 1 2 C9 10uF C9 10uF 1 2 C53 1uF 16V C53 1uF 16V D2 GREEN D2 GREEN 1 2 R1 750 R1 750 1 2 C56 10uF 10V...

Страница 22: ...22 AGND 23 CLKP 24 CLKM 25 AGND 26 AVDD 27 CFG3 28 CFG2 29 CFG1 30 AGND 31 AVDD 32 AGND 33 INC_P 34 INC_M 35 AGND 36 IND_P 37 IND_M 38 AGND 39 AVDD 40 PDN 41 SEN 42 SDATA 43 SCLK 44 DD1_P 45 DD1_M 46 DD0_P 47 DD0_M 48 LVDD 49 DC1_P 50 DC1_M 51 DC0_P 52 DC0_M 53 LGND 54 FCLK_P 55 FCLK_M 56 DCLK_P 57 DCLK_M 58 LGND 59 DB1_P 60 DB1_M 61 DB0_P 62 DB0_M 63 LVDD 64 GND 65 TP4 TP4 TP2 TP2 R32 1K R32 1K 1...

Страница 23: ...1TLB T9 WBC1 1TLB 3 2 1 6 5 4 R62 49 9 R62 49 9 R58 10 R58 10 R69 49 9 R69 49 9 R48 49 9 R48 49 9 R68 49 9 R68 49 9 R52 10 R52 10 C27 1uF C27 1uF 1 2 R65 10 R65 10 R49 49 9 R49 49 9 C29 1uF C29 1uF 1 2 C26 1uF C26 1uF 1 2 R71 10 R71 10 1 1 1 1 3 2 1 6 5 4 T3 WBC1 1TLB T3 WBC1 1TLB 3 2 1 6 5 4 R60 10 R60 10 C30 1uF C30 1uF 1 2 R47 49 9 R47 49 9 R66 10 R66 10 T6 WBC1 1TLB T6 WBC1 1TLB 3 2 1 6 5 4 T8...

Страница 24: ...1 2 C34 10uF 10V C34 10uF 10V 1 2 JP6 JP6 1 3 2 R15 200 R15 200 R16 69 8 R16 69 8 R10 49 9 R10 49 9 C43 1uF 16V C43 1uF 16V C35 1uF 16V C35 1uF 16V R17 100 R17 100 R83 10K 1 10W 1 R83 10K 1 10W 1 R22 348 R22 348 R12 100 R12 100 R8 348 R8 348 C44 22uF C44 22uF R9 499 R9 499 U2 THS4509 U2 THS4509 NC 1 VIN 2 CM1 4 VS 5 VS 6 VOUT 3 VS 7 VS 8 CM2 9 VOUT 10 VIN 11 PD 12 VS 13 VS 14 VS 15 VS 16 PAD 17 C3...

Страница 25: ... 28 30 32 34 36 38 40 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 G1 G2 G3 G4 G5 G6 G7 G8 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 S005 Physical Description Figure 14 Sh...

Страница 26: ...uct This notice contains important safety information about temperatures and voltages For additional information on TI s environmental and or safety programs please contact the TI application engineer or visit www ti com esh No license is granted under any patent right or other intellectual property right of TI covering or relating to any machine process or combination in which such TI products or...

Страница 27: ...usiness practice TI is not responsible or liable for any such statements TI products are not authorized for use in safety critical applications such as life support where a failure of the TI product would reasonably be expected to cause severe personal injury or death unless officers of the parties have executed an agreement specifically governing such use Buyers represent that they have all neces...

Страница 28: ...Mouser Electronics Authorized Distributor Click to View Pricing Inventory Delivery Lifecycle Information Texas Instruments ADS6423EVM ADS6443EVM ...

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