Texas Instruments ADS42 EVM Series, Руководство пользователя

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PC
USB USB
J8
J7
J17
CLK J19
CHA J6
CHB J3
J10 J12
ADS58C28/
ADS42xx
TSW1200
+6 V
+5 V
GND
Signal Generator
HP8844B or Equivalent
Signal Generator
HP8844B or Equivalent
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Basic Test Procedure
2 Basic Test Procedure
This section outlines the basic test procedure for testing the EVM.
2.1 Test Block Diagram
The test set-up for general testing of the ADS42xx/ADS58C28 EVM with the TSW1200 capture card is
shown in
Figure 3 .
Figure 3. Test Set-up Block Diagram
2.2 Verify Board Set-up
Verify jumper settings are in the correct position as outlined in Table 1 .
Table 1. Default ADS58C28/42xx EVM Rev B Jumper Setting for Serial
Interface
(1)
Jumper Default position Function
JP15 Short 1 2 DC supply
JP16 Short 1 2 DC supply
JP17 Short 2 3 DC supply, LDO
JP19 Short 2 3 DC supply, LDO
JP28 Short 2 3 DC supply, LDO
JP29 Short 2 3 DC supply, LDO
JP26 Open DC supply for ext buffer
JP27 Open DC supply for ext buffer
JP3 Short 2-3 OPA power down
JP4 Short 2-3 OPA power down
JP22 Open SDOUT to FPGA
JP20 Short 1 2 CDC
JP21 Short 1 2 CDC
J14 Short 1 2 CDC power down
J18 Open CDC, VCXO
JP8 Short 2 3 ADC SCLK for SPI
JP9 Short 2 3 ADC SDATA for SPI
JP10 Short 2 3 ADC SEN for SPI
JP11 Short 2 3 ADC for SPI, also reset
JP 12 Short 1 2 ADC Low speed mode disable
JP 13 Open
JP14 Short 7 8 ADC 2’s complement, DDR LVDS
(1)
The EVM schematic shows default setting of JP8 to JP11 as parallel interface ( Table 2 ) which is for
EVM installation. After EVM tested and released these jumpers are set as serial interface ( Table 1 ).
5 SLAU333 – March 2011 ADS42xx EVM
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