Power-Supply Requirements
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The SDRAM controller code is preloaded within the FPGA. The ADCPro software works with the USB 2.0
driver in the ADS1675REF environment, so that 8M, 24-bit sampled ADC data can be captured and saved
in the SDRAM per single acquisition in order to allow the FPGA processor to do post-data processing or
transfer the test data continually through the FPGA, SDRAM, and USB interface into a PC processor for
further data processing.
The Cypress CY22393 PLL can provide up to five clocks. The ADS1675REF platform uses one 48MHz
clock for the USB microcontroller, one 64MHz clock for the SDRAM chip, one 64MHz clock for the FPGA
processor, and one 32MHz clock for the ADS1675 device.
The ADS1675REF supports fast response mode for both the wide-bandwidth and low-latency filter paths,
as well as an internal shift clock (SCLK) mode for LVDS and CMOS digital output interfaces.
3
Power-Supply Requirements
WARNING
The Opal Kelly XEM3010 board can only accept a maximum 5V
power supply. When the 5V external wall adaptor is applied,
remove JP4. (See
for additional details.)
The factory configuration of the board is for the analog input driver THS4503 with +9V and –4V supplies
and a 5V supply for analog and digital REF board circuitry sections as well as the XEM3010
board. For the best total harmonic distortion (THD) performance, the user can provide independent digital
+5V to +5VD, +3.0V to 3.3VD, and wall a5V to P1 on the XEM3010 board. All power to the board
is recommend to be sourced from a well-regulated linear supply that has current-limiting capabilities; for
example, a 40mA limit for +9V and –4V, and 400mA limit for +VA.
Power must be supplied through jumpers J2, J4, J5, and J9 (top side of the REF board) and port P1 on
the XEM3010 board.
shows the recommended power-supply input configuration.
Table 1. Recommended Power-Supply Inputs
Signal Name
Connector Number
Description
+5VA
J5-1
J5-2
5V supply
+V
CC
J4-1
J4-2
Analog input 9V supply
–V
CC
J4-3
J4-2
Analog input driver –4V supply
+5VD (optional for the best
performance; remove R39 when using
J9-1
J9-2
D5V supply
+5VD)
+3.3VD (optional for the best
performance; remove JP2 when
J2-1
J2-2
D3.0V supply
ap3.0V)
+5V (optional for the best performance;
remove JP4 when applying a +5V wall
P1-1
P1-2
XEM3010 board +5V wall adaptor supply
adaptor to the XEM3010)
For standalone operation, the power sources can be applied via various test points located on the REF
board. Refer to the schematic (located at the end of this document) for additional details.
3.1
Analog Input 9V and –4V Supplies
The ADS1675REF analog input driver is a THS4503 (U3), a wideband, fully-differential amplifier, to drive
the differential inputs of the ADS1675 (U4) . This device was selected because of its wide bandwidth
(370MHz) and low harmonic distortion. It is pre-configured at the factory for +9V and –4V analog
operation. The THS4503 can tolerate maximum power supplies of ±7.5V
DC
. Care must be taken to ensure
the user-supplied 15V
DC
limit is not exceeded, or potential damage to the op amps under the test circuits
can occur. The +9V and –4V voltages are to be applied to J4 pins +V
CC
and –V
CC
referenced to GND.
4
ADS1675REF
SBAU162A – December 2009 – Revised September 2010
Copyright © 2009–2010, Texas Instruments Incorporated