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EVM Analog Interface
5 SBAU332A – March 2019 – Revised June 2019
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Copyright © 2019, Texas Instruments Incorporated
ADS131M04 Evaluation Module
2 EVM Analog Interface
The ADS131M04EVM is designed for easy interfacing with analog sources. This section covers the details
of the front-end circuit including jumper configuration for different input test signals and board connectors
for signal sources.
2.1 ADC Analog Input Signal Path
Analog inputs to the EVM can be connected to either the terminal blocks or to the header pins associated
with each ADC channel. The 3x2 100-mil headers for each channel allow the user to configure the inputs
differentially depending on the signal to be measured. The screw terminal blocks can interface directly
with the leads of an external sensor input.
Figure 2 shows the signal chain used for all four input channels
on the EVM and is used to describe the supported input options in Figure 3 , Table 2 , and Table 3 .
External voltage inputs can be applied to J1 pins 1 and 3. For single-ended inputs, install a jumper on
either JP1[1-2] or JP1[5-6] to connect an input to the EVM ground. If the external voltage is applied
through a series resistor, R1 or R2 can be used to form a resistor divider by installing JP1[3-4] to support
higher voltage measurements. Input jumper connections are described in
Table 2 . Similarly, R17 and R18
can be installed to form a resistor divider with the series 49.9- Ω resistors on each input. An input must not
be applied such that the voltage on the input pins of the ADS131M04 exceeds the absolute maximum
ratings. See the
ADS131M04 data sheet for details.
R1 and R2 also present a 2-k
Ω
differential load when all jumpers on JP1 are uninstalled. This load acts as
a burden resistor for a current transformer (CT) input. For single-ended measurements, the unused end of
the transformer secondary side can be tied to ground by installing the appropriate jumper on JP1.
R9, R10, and C9 form a differential low-pass filter with a –3-dB cutoff frequency of 1.594 MHz. The series
impedance is kept relatively low in order to maintain adequate total harmonic distortion (THD)
performance.
Figure 2. Input Terminal Blocks and Headers (Schematic)