Texas Instruments ADS1285EVM-PDK, Руководство пользователя, Страница: 13 / 40

7 ADS1285EVM-PDK Initial Setup
This section explains the initial hardware and software setup procedure that must be completed for properly
operating the ADS1285EVM-PDK.
7.1 Default Jumper Settings
After unpacking, the EVM is already configured with the default jumper settings. Figure 7-1 shows the locations
for the default jumpers and Table 7-1 shows the functions of the default shunts.
Figure 7-1. ADS1285EVM-PDK Jumper Default Settings
Table 7-1. Default Shunt Settings
Header Designator Position Function
J11 [1-2] Enables the REF62x supply to VREFP
J4 [1-2] Connects AVSS to GND for unipolar ADC supply mode
J7 [3-4] Connects CLK to an 8.192-MHz source from the crystal oscillator
J10 Not installed Header to supply the external reference voltage to VREFN and VREFP
J1 [1-2]
DAC PWR: Connects the output of the U4 LDO (AVSS+5V) to the DAC analog supply
pin (AVDD)
J1 [3-4]
DAC PWR: Connects the PHI digital supply (DVDD) to the DAC digital supply pin
(DVDD)
J15 [1-2]
ADC PWR: Connects the output of the U2 LDO (AVDD1) to the ADC analog supply 1
(AVDD1)
J15 [3-4]
ADC PWR: Connects the output of the U3 LDO (AVDD2) to the ADC analog supply 2
(AVDD2)
J15 [5-6] ADC PWR: Connects the PHI digital supply (DVDD) to the ADC digital supply (IOVDD)
J3 Not installed Header to supply the external input to U5 for the –2.5-V supply
J8 Not Installed Enables 8.192-MHz crystal oscillator
www.ti.com ADS1285EVM-PDK Initial Setup
SBAU394A – APRIL 2022 – REVISED SEPTEMBER 2022
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ADS1285EVM-PDK Evaluation Module 13
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