shows a schematic of the voltage reference.
1µF
C28
1µF
C25
AVSS
AVSS
AVSS
NOTE: This reference voltage is shared between
the ADS1285 and DAC1282
On-board references
Route REFP/REFN as differential
pair, and only connect REFN to
AVSS near the reference source(s).
AVSS
VREFP
VREFN
Header for measuring reference voltage or
connecting to an external reference source
AVSS
+ -
10.0k
R41
1
2
J11
Connects to 'DC127_ADC' and 'DC127_DAC' pages
REF6250 supply range: 5.3 - 5.5V
REF6241 supply range: 4.35 - 5.5V
REF6225 supply range: 3 - 5.5V
0.22
R39
0.01uF
C26
0.22
R37
VIN
1
EN
2
SS
3
FILT
4
OUT_S
5
OUT_F
6
GND_F
7
GND_S
8
REF6241IDGKR
U8
REF62xx EN
AVDD1
Reference options
22µF
C27
0
R38
0
R42
130k
R40
1
2
J10
Figure 5-3. Voltage Reference (Schematic)
The power supply for each active component on the EVM is bypassed with a ceramic capacitor placed close
to that component. Additionally, the EVM layout uses thick traces or large copper fill areas, where possible,
between bypass capacitors and their loads to minimize inductance along the load current path.
, power to the EVM is supplied by the PHI through connector J5. For
information about PHI pins and the power connections, see
With modifications, the user can use external supplies for any voltage supplies. Using the ADC PWR header
(J26), DAC PWR header (J1), and the unipolar or bipolar select (J4); the shunts can be depopulated for direct
access to the AVDD1, AVDD2, AVSS+5V, DVDD, and AVSS pins.
6 Digital-to-Analog Converter
The ADS1282EVM-PDK contains a DAC1282, which is a fully integrated digital-to-analog converter (DAC) that
provides a low-distortion, digital-synthesized voltage output designed for testing seismic equipment and the
ADS128x family of devices; see the
for more information. The DAC1282 can be used in
combination with the GUI to directly supply an input voltage for testing and performance purposes. For more
information on configuring the inputs to use the DAC1282, see
If using the DAC in Sine mode, the output frequency is programmable from 0.5 Hz to 250 Hz and the magnitude
is scaled by both analog and digital control. The analog gain is adjustable in 6-dB steps and the digital gain in
0.5-dB steps. The analog gain settings match those of the ADS1282 for testing at all gains with high resolution.
Controlling the settings of the DAC1282 can be done on the
DAC Configuration
page of the GUI as explained in
.
The DAC1282 uses AVSS+5V and DVDD for the power supplies and shares the same reference as the
ADS1285. This configuration minimizes potential errors from using separate references between the devices.
However, most of the DAC1282 documentation is in reference to a 5-V supply where the ADS1285EVM-PDK
uses a 4.096-V reference by default. As a result, the DAC output amplitude is scaled in reference to the 4.096-V
reference through the following equation:
V
out_peak
= V
FSR_peak
∙ 10
GDAC_Dig dB
20
(1)
where:
• V
out_peak
= Output amplitude of the DAC in Sine mode
• V
FSR_peak
= Positive peak of the full-scale range calculation, which depends on voltage reference
• G
DAC_Dig(dB)
= Digital gain of the DAC determined by the SINEG register
This equation and scaling is automatically calculated in the ADS1285EVM-PDK GUI; see
Digital-to-Analog Converter
12
ADS1285EVM-PDK Evaluation Module
SBAU394A – APRIL 2022 – REVISED SEPTEMBER 2022
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