Texas Instruments ADS1282, Руководство пользователя

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0.01 0.1
Normalized Frequency (f/f )
C
0
-
7.5
- 15.0
- 22.5
-
30.0
- 45.0
Amplitude(dB)
90
75
60
45
30
15
0
Phase(
)
°
1 10 100
Phase
Amplitude
- 37.5
GainError(dB)
Frequency Ratio (f /f )
HP DATA
0
-
0.10
-
0.20
-
0.30
-
0.40
-
0.50
0.0001 0.001 0.01 0.1
ADS1282
SBAS418I – SEPTEMBER 2007 – REVISED MARCH 2015 www.ti.com
Group Delay and Step Response (continued) 9.16 Master Clock Input (CLK)
The ADS1282 requires a clock input for operation.
The HPF causes a small gain error, in which case the
The clock is applied to the CLK pin. The data
magnitude of the error depends on the ratio of
conversion rate scales directly with the CLK
f
HP
/f
DATA
. For many common values of (f
HP
/f
DATA
), the
frequency. Power consumption versus CLK frequency
gain error is negligible. Figure 45 shows the gain
is relatively constant (see the Typical Characteristics ).
error of the HPF. The gain error factor is illustrated in
Equation 13 (see the Appendix at the end of this
As with any high-speed data converter, a high-quality,
document).
low-jitter clock is essential for optimum performance.
Crystal clock oscillators are the recommended clock
source. Make sure to avoid excess ringing on the
clock input; keep the clock trace as short as possible
and use a 50
Ω series resistor close to the source.
9.17 Synchronization
(Sync Pin and Sync Command)
The ADS1282 can be synchronized to an external
event, as well as synchronized to other ADS1282
devices if the sync event is applied simultaneously.
The ADS1282 has two sources for synchronization:
the SYNC input pin and the SYNC command. The
ADS1282 also has two synchronizing modes: Pulse-
sync and Continuous-sync. In Pulse-sync mode, the
ADS1282 synchronizes to a single sync event. In
Continuous-sync mode, either a single SYNC event is
Figure 45. HPF Gain Error
used to synchronize conversions or a continuous
clock is applied to the pin with a period equal to
Figure 46 shows the first-order amplitude and phase
integer multiples of the data rate. When the periods of
response of the HPF. Note that in the case of
the sync input and the DRDY output do not match,
applying step inputs or synchronizing, the settling
the ADS1282 re-synchronizes and conversions are
time of the filter should be taken into account.
restarted.
Figure 46. HPF Amplitude and Phase Response
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